drm/i915: Inline engine->init_context into its caller

We only use the init_context vfunc once while recording the default
context state, and we use the same sequence in each backend (eliding
steps that do not apply). Remove the vfunc for simplicity and
de-duplication.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190729113720.24830-1-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 8be63019d70776bca653807a796e31a518361562..da61dd32921000245caa711b009572cc4eac32c8 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -383,7 +383,6 @@ struct intel_engine_cs {
        const struct intel_context_ops *cops;
 
        int             (*request_alloc)(struct i915_request *rq);
-       int             (*init_context)(struct i915_request *rq);
 
        int             (*emit_flush)(struct i915_request *request, u32 mode);
 #define EMIT_INVALIDATE        BIT(0)

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 884dfc1cb03385d438b57f00241f50e3dd0d55b8..4d7c4d0dbf75e01735f6ba47109e7eaf18cb8a72 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -141,7 +141,6 @@
 #include "intel_gt.h"
 #include "intel_lrc_reg.h"
 #include "intel_mocs.h"
-#include "intel_renderstate.h"
 #include "intel_reset.h"
 #include "intel_workarounds.h"
 
@@ -2727,25 +2726,6 @@ static u32 *gen8_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs)
        return gen8_emit_wa_tail(request, cs);
 }
 
-static int gen8_init_rcs_context(struct i915_request *rq)
-{
-       int ret;
-
-       ret = intel_engine_emit_ctx_wa(rq);
-       if (ret)
-               return ret;
-
-       ret = intel_rcs_context_init_mocs(rq);
-       /*
-        * Failing to program the MOCS is non-fatal.The system will not
-        * run at peak performance. So generate an error and carry on.
-        */
-       if (ret)
-               DRM_ERROR("MOCS failed to program: expect performance issues.\n");
-
-       return intel_renderstate_emit(rq);
-}
-
 static void execlists_park(struct intel_engine_cs *engine)
 {
        del_timer_sync(&engine->execlists.timer);
@@ -2853,7 +2833,6 @@ int intel_execlists_submission_setup(struct intel_engine_cs *engine)
        logical_ring_default_irqs(engine);
 
        if (engine->class == RENDER_CLASS) {
-               engine->init_context = gen8_init_rcs_context;
                engine->emit_flush = gen8_emit_flush_render;
                engine->emit_fini_breadcrumb = gen8_emit_fini_breadcrumb_rcs;
        }

diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
index 290a5e9b90b92dbe51d942f2c2f792cb75708b16..e082b25d2db1252df258cb934e55e8411a3f78c0 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -568,11 +568,14 @@ void intel_mocs_init_l3cc_table(struct intel_gt *gt)
  *
  * Return: 0 on success, otherwise the error status.
  */
-int intel_rcs_context_init_mocs(struct i915_request *rq)
+int intel_mocs_emit(struct i915_request *rq)
 {
        struct drm_i915_mocs_table t;
        int ret;
 
+       if (rq->engine->class != RENDER_CLASS)
+               return 0;
+
        if (get_mocs_settings(rq->engine->gt, &t)) {
                /* Program the RCS control registers */
                ret = emit_mocs_control_table(rq, &t);

diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.h b/drivers/gpu/drm/i915/gt/intel_mocs.h
index 8b9813e6f9ace7255cd431fb709c9b83e0a98932..a334db2d6d6b06238fb36b3bda0aa0fac269092b 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_mocs.h
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.h
@@ -54,8 +54,9 @@ struct i915_request;
 struct intel_engine_cs;
 struct intel_gt;
 
-int intel_rcs_context_init_mocs(struct i915_request *rq);
 void intel_mocs_init_l3cc_table(struct intel_gt *gt);
 void intel_mocs_init_engine(struct intel_engine_cs *engine);
 
+int intel_mocs_emit(struct i915_request *rq);
+
 #endif

diff --git a/drivers/gpu/drm/i915/gt/intel_renderstate.c b/drivers/gpu/drm/i915/gt/intel_renderstate.c
index 06a8dc40b19fb90dc23886684994be94d209a932..be37d4501c675c41188e3ac172df6f3809852024 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_renderstate.c
+++ b/drivers/gpu/drm/i915/gt/intel_renderstate.c
@@ -41,7 +41,7 @@ struct intel_renderstate {
 static const struct intel_renderstate_rodata *
 render_state_get_rodata(const struct intel_engine_cs *engine)
 {
-       if (engine->id != RCS0)
+       if (engine->class != RENDER_CLASS)
                return NULL;
 
        switch (INTEL_GEN(engine->i915)) {

diff --git a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
index 1de19dac4a14462dd467923fe19e4bb00f7a5869..5c7f2fdc5ec3891184a48b1a7a8bd5d12a1a249a 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
@@ -37,7 +37,6 @@
 #include "i915_trace.h"
 #include "intel_context.h"
 #include "intel_gt.h"
-#include "intel_renderstate.h"
 #include "intel_reset.h"
 #include "intel_workarounds.h"
 
@@ -849,21 +848,6 @@ static void reset_finish(struct intel_engine_cs *engine)
 {
 }
 
-static int intel_rcs_ctx_init(struct i915_request *rq)
-{
-       int ret;
-
-       ret = intel_engine_emit_ctx_wa(rq);
-       if (ret != 0)
-               return ret;
-
-       ret = intel_renderstate_emit(rq);
-       if (ret)
-               return ret;
-
-       return 0;
-}
-
 static int rcs_resume(struct intel_engine_cs *engine)
 {
        struct drm_i915_private *dev_priv = engine->i915;
@@ -2227,11 +2211,9 @@ static void setup_rcs(struct intel_engine_cs *engine)
        engine->irq_enable_mask = GT_RENDER_USER_INTERRUPT;
 
        if (INTEL_GEN(i915) >= 7) {
-               engine->init_context = intel_rcs_ctx_init;
                engine->emit_flush = gen7_render_ring_flush;
                engine->emit_fini_breadcrumb = gen7_rcs_emit_breadcrumb;
        } else if (IS_GEN(i915, 6)) {
-               engine->init_context = intel_rcs_ctx_init;
                engine->emit_flush = gen6_render_ring_flush;
                engine->emit_fini_breadcrumb = gen6_rcs_emit_breadcrumb;
        } else if (IS_GEN(i915, 5)) {

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 01dd0d1d9bf6ab55f411fe2e377a7252372634cc..65863e955f40e54acbcdcf71f1f707f12dfef224 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -50,6 +50,7 @@
 #include "gt/intel_gt_pm.h"
 #include "gt/intel_mocs.h"
 #include "gt/intel_reset.h"
+#include "gt/intel_renderstate.h"
 #include "gt/intel_workarounds.h"
 
 #include "i915_drv.h"
@@ -1294,10 +1295,24 @@ static int __intel_engines_record_defaults(struct drm_i915_private *i915)
                        goto err_active;
                }
 
-               err = 0;
-               if (rq->engine->init_context)
-                       err = rq->engine->init_context(rq);
+               err = intel_engine_emit_ctx_wa(rq);
+               if (err)
+                       goto err_rq;
+
+               /*
+                * Failing to program the MOCS is non-fatal.The system will not
+                * run at peak performance. So warn the user and carry on.
+                */
+               err = intel_mocs_emit(rq);
+               if (err)
+                       dev_notice(i915->drm.dev,
+                                  "Failed to program MOCS registers; expect performance issues.\n");
+
+               err = intel_renderstate_emit(rq);
+               if (err)
+                       goto err_rq;
 
+err_rq:
                i915_request_add(rq);
                if (err)
                        goto err_active;