break;
}
- memset((void*)adev->sdma.instance, 0,
+ memset((void *)adev->sdma.instance, 0,
sizeof(struct amdgpu_sdma_instance) * AMDGPU_MAX_SDMA_INSTANCES);
}
if (adev->asic_type == CHIP_ARCTURUS) {
/* Acturus will leverage the same FW memory
for every SDMA instance */
- memcpy((void*)&adev->sdma.instance[i],
- (void*)&adev->sdma.instance[0],
+ memcpy((void *)&adev->sdma.instance[i],
+ (void *)&adev->sdma.instance[0],
sizeof(struct amdgpu_sdma_instance));
}
else {
break;
}
- memset((void*)adev->sdma.instance, 0,
+ memset((void *)adev->sdma.instance, 0,
sizeof(struct amdgpu_sdma_instance) * AMDGPU_MAX_SDMA_INSTANCES);
}
for (i = 1; i < adev->sdma.num_instances; i++) {
if (adev->asic_type >= CHIP_SIENNA_CICHLID &&
adev->asic_type <= CHIP_DIMGREY_CAVEFISH) {
- memcpy((void*)&adev->sdma.instance[i],
- (void*)&adev->sdma.instance[0],
+ memcpy((void *)&adev->sdma.instance[i],
+ (void *)&adev->sdma.instance[0],
sizeof(struct amdgpu_sdma_instance));
} else {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_sdma%d.bin", chip_name, i);