net: ethernet: mtk-star-emac: enable half duplex hardware support

Current driver doesn't support half duplex correctly.
This patch enable half duplex capability in hardware.

Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Signed-off-by: Yinghua Pan <ot_yinghua.pan@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/mediatek/mtk_star_emac.c b/drivers/net/ethernet/mediatek/mtk_star_emac.c
index 87c6c9bc221d0fce7fc2d31d3b8cc32cd881a142..21c3668194eb4f73073ebe0b2ff469d716aaacdb 100644 (file)
--- a/drivers/net/ethernet/mediatek/mtk_star_emac.c
+++ b/drivers/net/ethernet/mediatek/mtk_star_emac.c
@@ -883,32 +883,26 @@ static void mtk_star_phy_config(struct mtk_star_priv *priv)
        val <<= MTK_STAR_OFF_PHY_CTRL1_FORCE_SPD;
 
        val |= MTK_STAR_BIT_PHY_CTRL1_AN_EN;
-       val |= MTK_STAR_BIT_PHY_CTRL1_FORCE_FC_RX;
-       val |= MTK_STAR_BIT_PHY_CTRL1_FORCE_FC_TX;
-       /* Only full-duplex supported for now. */
-       val |= MTK_STAR_BIT_PHY_CTRL1_FORCE_DPX;
-
-       regmap_write(priv->regs, MTK_STAR_REG_PHY_CTRL1, val);
-
        if (priv->pause) {
-               val = MTK_STAR_VAL_FC_CFG_SEND_PAUSE_TH_2K;
-               val <<= MTK_STAR_OFF_FC_CFG_SEND_PAUSE_TH;
-               val |= MTK_STAR_BIT_FC_CFG_UC_PAUSE_DIR;
+               val |= MTK_STAR_BIT_PHY_CTRL1_FORCE_FC_RX;
+               val |= MTK_STAR_BIT_PHY_CTRL1_FORCE_FC_TX;
+               val |= MTK_STAR_BIT_PHY_CTRL1_FORCE_DPX;
        } else {
-               val = 0;
+               val &= ~MTK_STAR_BIT_PHY_CTRL1_FORCE_FC_RX;
+               val &= ~MTK_STAR_BIT_PHY_CTRL1_FORCE_FC_TX;
+               val &= ~MTK_STAR_BIT_PHY_CTRL1_FORCE_DPX;
        }
+       regmap_write(priv->regs, MTK_STAR_REG_PHY_CTRL1, val);
 
+       val = MTK_STAR_VAL_FC_CFG_SEND_PAUSE_TH_2K;
+       val <<= MTK_STAR_OFF_FC_CFG_SEND_PAUSE_TH;
+       val |= MTK_STAR_BIT_FC_CFG_UC_PAUSE_DIR;
        regmap_update_bits(priv->regs, MTK_STAR_REG_FC_CFG,
                           MTK_STAR_MSK_FC_CFG_SEND_PAUSE_TH |
                           MTK_STAR_BIT_FC_CFG_UC_PAUSE_DIR, val);
 
-       if (priv->pause) {
-               val = MTK_STAR_VAL_EXT_CFG_SND_PAUSE_RLS_1K;
-               val <<= MTK_STAR_OFF_EXT_CFG_SND_PAUSE_RLS;
-       } else {
-               val = 0;
-       }
-
+       val = MTK_STAR_VAL_EXT_CFG_SND_PAUSE_RLS_1K;
+       val <<= MTK_STAR_OFF_EXT_CFG_SND_PAUSE_RLS;
        regmap_update_bits(priv->regs, MTK_STAR_REG_EXT_CFG,
                           MTK_STAR_MSK_EXT_CFG_SND_PAUSE_RLS, val);
 }