#define X86_FEATURE_KVM_MIGRATION_CONTROL KVM_X86_CPU_FEATURE(0x40000001, 0, EAX, 17)
/* CPUID.1.ECX */
-#define CPUID_XSAVE (1ul << 26)
#define CPUID_OSXSAVE (1ul << 27)
/* Page table bitfield declarations */
return __cpuid(function, 0, eax, ebx, ecx, edx);
}
+static inline bool this_cpu_has(struct kvm_x86_cpu_feature feature)
+{
+ uint32_t gprs[4];
+
+ __cpuid(feature.function, feature.index,
+ &gprs[KVM_CPUID_EAX], &gprs[KVM_CPUID_EBX],
+ &gprs[KVM_CPUID_ECX], &gprs[KVM_CPUID_EDX]);
+
+ return gprs[feature.reg] & BIT(feature.bit);
+}
+
#define SET_XMM(__var, __xmm) \
asm volatile("movq %0, %%"#__xmm : : "r"(__var) : #__xmm)
static inline void check_cpuid_xsave(void)
{
- uint32_t eax, ebx, ecx, edx;
-
- cpuid(1, &eax, &ebx, &ecx, &edx);
- if (!(ecx & CPUID_XSAVE))
- GUEST_ASSERT(!"cpuid: no CPU xsave support!");
- if (!(ecx & CPUID_OSXSAVE))
- GUEST_ASSERT(!"cpuid: no OS xsave support!");
+ GUEST_ASSERT(this_cpu_has(X86_FEATURE_XSAVE));
+ GUEST_ASSERT(this_cpu_has(X86_FEATURE_OSXSAVE));
}
static bool check_xsave_supports_xtile(void)