MIPS: Define & use CP0_EBase bit definitions

Add definitions for the bits & fields in the CP0_EBase register, and use
them from a few different places in arch/mips which hardcoded these
values.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Jayachandran C <jchandra@broadcom.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13222/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index b7705ef09df23c228e7ead8d62189fadeb70492e..57d72f2bf7450f054b4e3d3ccdbb1247a67e14bb 100644 (file)
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -676,6 +676,14 @@
 #define MIPS_MAAR_S            (_ULCAST_(1) << 1)
 #define MIPS_MAAR_V            (_ULCAST_(1) << 0)
 
+/* EBase bit definitions */
+#define MIPS_EBASE_CPUNUM_SHIFT        0
+#define MIPS_EBASE_CPUNUM      (_ULCAST_(0x3ff) << 0)
+#define MIPS_EBASE_WG_SHIFT    11
+#define MIPS_EBASE_WG          (_ULCAST_(1) << 11)
+#define MIPS_EBASE_BASE_SHIFT  12
+#define MIPS_EBASE_BASE                (~_ULCAST_((1 << MIPS_EBASE_BASE_SHIFT) - 1))
+
 /* CMGCRBase bit definitions */
 #define MIPS_CMGCRB_BASE       11
 #define MIPS_CMGCRF_BASE       (~_ULCAST_((1 << MIPS_CMGCRB_BASE) - 1))
@@ -2104,7 +2112,7 @@ __BUILD_SET_C0(brcm_mode)
  */
 static inline unsigned int get_ebase_cpunum(void)
 {
-       return read_c0_ebase() & 0x3ff;
+       return read_c0_ebase() & MIPS_EBASE_CPUNUM;
 }
 
 #endif /* !__ASSEMBLY__ */

diff --git a/arch/mips/kvm/trap_emul.c b/arch/mips/kvm/trap_emul.c
index c4038d2a724c0df9746a75c67c358deb3d620071..fd43f0afdb9f0b2f31a78a4f8b6b89d34a906315 100644 (file)
--- a/arch/mips/kvm/trap_emul.c
+++ b/arch/mips/kvm/trap_emul.c
@@ -505,7 +505,8 @@ static int kvm_trap_emul_vcpu_setup(struct kvm_vcpu *vcpu)
        kvm_write_c0_guest_intctl(cop0, 0xFC000000);
 
        /* Put in vcpu id as CPUNum into Ebase Reg to handle SMP Guests */
-       kvm_write_c0_guest_ebase(cop0, KVM_GUEST_KSEG0 | (vcpu_id & 0xFF));
+       kvm_write_c0_guest_ebase(cop0, KVM_GUEST_KSEG0 |
+                                      (vcpu_id & MIPS_EBASE_CPUNUM));
 
        return 0;
 }

diff --git a/arch/mips/netlogic/xlp/nlm_hal.c b/arch/mips/netlogic/xlp/nlm_hal.c
index 80ec929747c37b30eb8da5749c21134b1c0b4558..25ee69489e5eb8615a5c5a6fdcf199a1e8fb33d8 100644 (file)
--- a/arch/mips/netlogic/xlp/nlm_hal.c
+++ b/arch/mips/netlogic/xlp/nlm_hal.c
@@ -58,7 +58,7 @@ void nlm_node_init(int node)
                nodep->coremask = 1;    /* node 0, boot cpu */
        nodep->sysbase = nlm_get_sys_regbase(node);
        nodep->picbase = nlm_get_pic_regbase(node);
-       nodep->ebase = read_c0_ebase() & (~((1 << 12) - 1));
+       nodep->ebase = read_c0_ebase() & MIPS_EBASE_BASE;
        if (cpu_is_xlp9xx())
                nodep->socbus = xlp9xx_get_socbus(node);
        else

diff --git a/arch/mips/netlogic/xlr/setup.c b/arch/mips/netlogic/xlr/setup.c
index d118b9aa7647408035c64935b7b222d60b6c0cc8..72ceddc9a03ff8afb00496e6187a3fa3e17a8c6c 100644 (file)
--- a/arch/mips/netlogic/xlr/setup.c
+++ b/arch/mips/netlogic/xlr/setup.c
@@ -168,7 +168,7 @@ static void nlm_init_node(void)
 
        nodep = nlm_current_node();
        nodep->picbase = nlm_mmio_base(NETLOGIC_IO_PIC_OFFSET);
-       nodep->ebase = read_c0_ebase() & (~((1 << 12) - 1));
+       nodep->ebase = read_c0_ebase() & MIPS_EBASE_BASE;
        spin_lock_init(&nodep->piclock);
 }