drm/amd/display: Fix CW4 programming for dmub30 cached inbox

[Why]
The conditions for whether we used cached vs non-cached inbox1 depend
on a version check that mismatches what the shared helpers in dmub20
implement.

[How]
Use the dmub_dcn20_use_cached_inbox check for dmub_dcn30 as well.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c
index 26716c41786a29025f2e524ca8f22dc8966aed0c..8e8e65fa83c020619bd048dc4b191e16a3bb321d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c
@@ -81,7 +81,7 @@ static inline void dmub_dcn20_translate_addr(const union dmub_addr *addr_in,
        addr_out->quad_part = addr_in->quad_part - fb_base + fb_offset;
 }
 
-static inline bool dmub_dcn20_use_cached_inbox(struct dmub_srv *dmub)
+bool dmub_dcn20_use_cached_inbox(struct dmub_srv *dmub)
 {
        /* Cached inbox is not supported in this fw version range */
        return !(dmub->fw_version >= DMUB_FW_VERSION(1, 0, 0) &&

diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h
index d438f365cbb08f5405bc09902787dc9d47f62fc3..a62be9c0652e3ec19332b8ae3ffbcb5677c5a695 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h
@@ -198,4 +198,6 @@ void dmub_dcn20_skip_dmub_panel_power_sequence(struct dmub_srv *dmub, bool skip)
 
 union dmub_fw_boot_status dmub_dcn20_get_fw_boot_status(struct dmub_srv *dmub);
 
+bool dmub_dcn20_use_cached_inbox(struct dmub_srv *dmub);
+
 #endif /* _DMUB_DCN20_H_ */

diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c
index 7e6f4dbabe45b6996e617cd8fd94b9b378b0130d..b4bc0df2f14a3e66ff169c449f43fbb888d89004 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c
@@ -155,7 +155,7 @@ void dmub_dcn30_setup_windows(struct dmub_srv *dmub,
        offset = cw4->offset;
 
        /* New firmware can support CW4. */
-       if (dmub->fw_version > DMUB_FW_VERSION(1, 0, 10)) {
+       if (dmub_dcn20_use_cached_inbox(dmub)) {
                REG_WRITE(DMCUB_REGION3_CW4_OFFSET, offset.u.low_part);
                REG_WRITE(DMCUB_REGION3_CW4_OFFSET_HIGH, offset.u.high_part);
                REG_WRITE(DMCUB_REGION3_CW4_BASE_ADDRESS, cw4->region.base);