drm/i915: Move MMCD_MISC_CTRL from context w/a to standard

Looking at gem_workarounds shows us that MMCD_MISC_CTRL is not restored
following a suspend-resume cycle. This implies that MMCD_MISC_CTRL is
not stored in the context, but is an ordinary register w/a that we need to
restore during init_hw.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Oscar Mateo <oscar.mateo@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171004124153.14142-1-chris@chris-wilson.co.uk
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index a75f5e889927848c562dc198ce89c5dc4ed3ee71..8625feb0939e5bed849aa1e4a774209fd27b49fb 100644 (file)
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -980,7 +980,11 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
                                  GEN9_PBE_COMPRESSED_HASH_SELECTION);
                WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
                                  GEN9_SAMPLER_HASH_COMPRESSED_READ_ADDR);
-               WA_SET_BIT(MMCD_MISC_CTRL, MMCD_PCLA | MMCD_HOTSPOT_EN);
+
+               I915_WRITE(MMCD_MISC_CTRL,
+                          I915_READ(MMCD_MISC_CTRL) |
+                          MMCD_PCLA |
+                          MMCD_HOTSPOT_EN);
        }
 
        /* WaClearFlowControlGpgpuContextSave:skl,bxt,kbl,glk,cfl */