]> git.baikalelectronics.ru Git - kernel.git/commitdiff
KVM: x86/pmu: Expose CPUIDs feature bits PDCM, DS, DTES64
authorLike Xu <likexu@tencent.com>
Mon, 11 Apr 2022 10:19:46 +0000 (18:19 +0800)
committerPaolo Bonzini <pbonzini@redhat.com>
Wed, 8 Jun 2022 08:48:22 +0000 (04:48 -0400)
The CPUID features PDCM, DS and DTES64 are required for PEBS feature.
KVM would expose CPUID feature PDCM, DS and DTES64 to guest when PEBS
is supported in the KVM on the Ice Lake server platforms.

Originally-by: Andi Kleen <ak@linux.intel.com>
Co-developed-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Co-developed-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Like Xu <likexu@tencent.com>
Message-Id: <20220411101946.20262-18-likexu@tencent.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/x86/kvm/vmx/capabilities.h
arch/x86/kvm/vmx/vmx.c

index 5f656c9e33be1b0318316ba8a76a6a4056488897..f14c4bef97e0a34b7b30af0a0aecf35b3cf38d89 100644 (file)
@@ -6,6 +6,7 @@
 
 #include "lapic.h"
 #include "x86.h"
+#include "pmu.h"
 
 extern bool __read_mostly enable_vpid;
 extern bool __read_mostly flexpriority_enabled;
@@ -398,23 +399,28 @@ static inline bool vmx_pt_mode_is_host_guest(void)
        return pt_mode == PT_MODE_HOST_GUEST;
 }
 
-static inline u64 vmx_get_perf_capabilities(void)
+static inline bool vmx_pebs_supported(void)
 {
-       u64 perf_cap = 0;
+       return boot_cpu_has(X86_FEATURE_PEBS) && kvm_pmu_cap.pebs_ept;
+}
 
-       if (!enable_pmu)
-               return perf_cap;
+static inline u64 vmx_get_perf_capabilities(void)
+{
+       u64 perf_cap = PMU_CAP_FW_WRITES;
+       u64 host_perf_cap = 0;
 
        if (boot_cpu_has(X86_FEATURE_PDCM))
-               rdmsrl(MSR_IA32_PERF_CAPABILITIES, perf_cap);
+               rdmsrl(MSR_IA32_PERF_CAPABILITIES, host_perf_cap);
 
-       perf_cap &= PMU_CAP_LBR_FMT;
+       perf_cap |= host_perf_cap & PMU_CAP_LBR_FMT;
 
-       /*
-        * Since counters are virtualized, KVM would support full
-        * width counting unconditionally, even if the host lacks it.
-        */
-       return PMU_CAP_FW_WRITES | perf_cap;
+       if (vmx_pebs_supported()) {
+               perf_cap |= host_perf_cap & PERF_CAP_PEBS_MASK;
+               if ((perf_cap & PERF_CAP_PEBS_FORMAT) < 4)
+                       perf_cap &= ~PERF_CAP_PEBS_BASELINE;
+       }
+
+       return perf_cap;
 }
 
 static inline u64 vmx_supported_debugctl(void)
index 403a8834cc79f20684bf90a7bf53c3ca206f58bb..55a8578255cbe6320926e1328c3ecaf7e922e24f 100644 (file)
@@ -2245,6 +2245,17 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
                        if (!cpuid_model_is_consistent(vcpu))
                                return 1;
                }
+               if (data & PERF_CAP_PEBS_FORMAT) {
+                       if ((data & PERF_CAP_PEBS_MASK) !=
+                           (vmx_get_perf_capabilities() & PERF_CAP_PEBS_MASK))
+                               return 1;
+                       if (!guest_cpuid_has(vcpu, X86_FEATURE_DS))
+                               return 1;
+                       if (!guest_cpuid_has(vcpu, X86_FEATURE_DTES64))
+                               return 1;
+                       if (!cpuid_model_is_consistent(vcpu))
+                               return 1;
+               }
                ret = kvm_set_msr_common(vcpu, msr_info);
                break;
 
@@ -7517,6 +7528,10 @@ static __init void vmx_set_cpu_caps(void)
                kvm_cpu_cap_clear(X86_FEATURE_INVPCID);
        if (vmx_pt_mode_is_host_guest())
                kvm_cpu_cap_check_and_set(X86_FEATURE_INTEL_PT);
+       if (vmx_pebs_supported()) {
+               kvm_cpu_cap_check_and_set(X86_FEATURE_DS);
+               kvm_cpu_cap_check_and_set(X86_FEATURE_DTES64);
+       }
 
        if (!enable_sgx) {
                kvm_cpu_cap_clear(X86_FEATURE_SGX);