drm/i915/icl: add Wa_22010271021 for all gen11

Wa_22010271021 does not apply only to EHL, but to all gen11 and other
gen12 platforms. Gen12 is already covered in another code path, but we
need to stop checking for EHL when handling gen11.

Bspec: 33450, 52887

v2: Remove "gen11" suffix as it also applies to gen12 platforms

Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Caz Yokoyama <caz.yokoyama@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210324200502.1731265-3-lucas.demarchi@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 25785b46d1e41fe7a0472406c17cb953b04e4d37..30b902fade1d96a05740f4ba69d30468f69996aa 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1781,11 +1781,10 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
                            GEN7_FF_THREAD_MODE,
                            GEN12_FF_TESSELATION_DOP_GATE_DISABLE);
 
-               /* Wa_22010271021:ehl */
-               if (IS_JSL_EHL(i915))
-                       wa_masked_en(wal,
-                                    GEN9_CS_DEBUG_MODE1,
-                                    FF_DOP_CLOCK_GATE_DISABLE);
+               /* Wa_22010271021 */
+               wa_masked_en(wal,
+                            GEN9_CS_DEBUG_MODE1,
+                            FF_DOP_CLOCK_GATE_DISABLE);
        }
 
        if (IS_GEN_RANGE(i915, 9, 12)) {