UDOO_NEO_TYPE_EXTENDED,
};
-#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \
PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
return 0;
}
-static iomux_v3_cfg_t const uart1_pads[] = {
- MX6_PAD_GPIO1_IO04__UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_GPIO1_IO05__UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
static iomux_v3_cfg_t const usdhc2_pads[] = {
MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_QSPI1A_DATA0__GPIO4_IO_16 | MUX_PAD_CTRL(NO_PAD_CTRL),
};
-static void setup_iomux_uart(void)
-{
- imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
-}
-
static int setup_fec(void)
{
struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
return 0;
}
-int board_early_init_f(void)
-{
- setup_iomux_uart();
-
- return 0;
-}
-
static struct fsl_esdhc_cfg usdhc_cfg[1] = {
{USDHC2_BASE_ADDR},
};
/* setup AIPS and disable watchdog */
arch_cpu_init();
- board_early_init_f();
-
/* setup GP timer */
timer_init();
+ /* Enable device tree and early DM support*/
+ spl_early_init();
+
/* UART clocks enabled and gd valid - init serial console */
preloader_console_init();
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd"
-CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_SPL_MALLOC=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_FS_EXT4=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_ANATOP=y
CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y