drm/i915/skl: Fix has_ipc on skl and document WaDisableIPC.

According to Spec for SKL+: "Isochronous Priority Control.
If enabled, Display sends demoted requests once the transition
watermark is reached. If transition watermark is not enabled,
Display sends demoted requests when the display buffer is full."

The commit 'e57f1c02155f ("drm/i915/gen9+: Add has_ipc flag in
device info structure")' introduced that as gen9+ but missing many
SKL Skus.

I believe the reason for that is Spec also mentions workarounds for
SKL-ALL: "IPC (Isoch Priority Control) may cause underflows
WA: Do not enable IPC in register ARB_CTL2"

It seems lame to add the feature and forever disable it,
but it will avoid a mistake of enabling it when we are reorganizing
the feature definitions on i915_pci.c later.

It will also allow us to probably extend that workaround for
other platforms.

Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171003063652.17248-1-rodrigo.vivi@intel.com

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 17823980b40d8c46d7a1fc36947e663277d1402f..66f4ab0cb2e8f3a82ec9ba247d33ac17793bd672 100644 (file)
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -426,6 +426,7 @@ static const struct intel_device_info intel_cherryview_info __initconst = {
        .platform = INTEL_SKYLAKE, \
        .has_csr = 1, \
        .has_guc = 1, \
+       .has_ipc = 1, \
        .ddb_size = 896
 
 static const struct intel_device_info intel_skylake_gt1_info __initconst = {

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index c66af09e27a7541364e34462ed405c72bfa213a3..171b21f6c4adfae3efc303c30f172a8ed0839dd4 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5827,6 +5827,12 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
 {
        u32 val;
 
+       /* Display WA #0477 WaDisableIPC: skl */
+       if (IS_SKYLAKE(dev_priv)) {
+               dev_priv->ipc_enabled = false;
+               return;
+       }
+
        val = I915_READ(DISP_ARB_CTL2);
 
        if (dev_priv->ipc_enabled)