]> git.baikalelectronics.ru Git - kernel.git/commitdiff
arch: nios2: rename 'altr,gpio-bank-width' -> 'altr,ngpio'
authorAlexandru Ardelean <alexandru.ardelean@analog.com>
Fri, 10 Apr 2020 15:40:37 +0000 (23:40 +0800)
committerLey Foon Tan <ley.foon.tan@intel.com>
Fri, 10 Apr 2020 17:45:52 +0000 (01:45 +0800)
There is no more 'altr,gpio-bank-width' in the 'altr,pio-1.0' driver.
There is a 'altr,ngpio' which is  what the property wants to configure.

This change updates all occurrences of 'altr,gpio-bank-width' to
'altr,ngpio'.

Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Documentation/devicetree/bindings/fpga/fpga-region.txt
arch/nios2/boot/dts/10m50_devboard.dts

index 90c44694a30b16b6cdb04126be2a9f328667e7f6..b0dacb6a3390e3b9bd384e6b31223559576a2c86 100644 (file)
@@ -263,7 +263,7 @@ Overlay contains:
                        gpio@10040 {
                                compatible = "altr,pio-1.0";
                                reg = <0x10040 0x20>;
-                               altr,gpio-bank-width = <4>;
+                               altr,ngpio = <4>;
                                #gpio-cells = <2>;
                                clocks = <2>;
                                gpio-controller;
@@ -468,7 +468,7 @@ programming is the FPGA based bridge of fpga_region1.
                                compatible = "altr,pio-1.0";
                                reg = <0x10040 0x20>;
                                clocks = <0x2>;
-                               altr,gpio-bank-width = <0x4>;
+                               altr,ngpio = <0x4>;
                                resetvalue = <0x0>;
                                #gpio-cells = <0x2>;
                                gpio-controller;
index 5e4ab032c1e80960831149cb8664a46d103957a7..739ad96a6cc1dd48885d32e4ac23df6748c8abf4 100644 (file)
                led_pio: gpio@180014d0 {
                        compatible = "altr,pio-1.0";
                        reg = <0x180014d0 0x00000010>;
-                       altr,gpio-bank-width = <4>;
+                       altr,ngpio = <4>;
                        resetvalue = <15>;
                        #gpio-cells = <2>;
                        gpio-controller;
                        reg = <0x180014c0 0x00000010>;
                        interrupt-parent = <&cpu>;
                        interrupts = <6>;
-                       altr,gpio-bank-width = <3>;
+                       altr,ngpio = <3>;
                        altr,interrupt-type = <2>;
                        edge_type = <1>;
                        level_trigger = <0>;