]> git.baikalelectronics.ru Git - kernel.git/commitdiff
KVM: arm/arm64: vgic-v2: Clear all dirty LRs
authorChristoffer Dall <christoffer.dall@linaro.org>
Wed, 25 May 2016 14:26:33 +0000 (15:26 +0100)
committerChristoffer Dall <christoffer.dall@linaro.org>
Tue, 31 May 2016 14:09:28 +0000 (16:09 +0200)
When saving the state of the list registers, it is critical to
reset them zero, as we could otherwise leave unexpected EOI
interrupts pending for virtual level interrupts.

Cc: stable@vger.kernel.org # v4.6+
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
virt/kvm/arm/hyp/vgic-v2-sr.c

index a3f12b3b277b949970f462f7305d4edce3a5f8c5..3a3a699b748950f6ead0766e681f73a2ba28de48 100644 (file)
@@ -100,12 +100,11 @@ static void __hyp_text save_lrs(struct kvm_vcpu *vcpu, void __iomem *base)
                if (!(vcpu->arch.vgic_cpu.live_lrs & (1UL << i)))
                        continue;
 
-               if (cpu_if->vgic_elrsr & (1UL << i)) {
+               if (cpu_if->vgic_elrsr & (1UL << i))
                        cpu_if->vgic_lr[i] &= ~GICH_LR_STATE;
-                       continue;
-               }
+               else
+                       cpu_if->vgic_lr[i] = readl_relaxed(base + GICH_LR0 + (i * 4));
 
-               cpu_if->vgic_lr[i] = readl_relaxed(base + GICH_LR0 + (i * 4));
                writel_relaxed(0, base + GICH_LR0 + (i * 4));
        }
 }