clk: imx: add imx8m_clk_hw_composite_bus

Introduce imx8m_clk_hw_composite_bus api for bus clk root slice usage.
Because the mux switch sequence issue, we could not reuse Peripheral
Clock Slice code, need use composite specific mux operation.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c
index 2d9562ebddc3f6303f2c3a33ea0080dcc08d0882..d2b5af826f2ca3db3b2ba1839e627fea6097725b 100644 (file)
--- a/drivers/clk/imx/clk-composite-8m.c
+++ b/drivers/clk/imx/clk-composite-8m.c
@@ -205,6 +205,11 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name,
                div->width = PCG_CORE_DIV_WIDTH;
                divider_ops = &clk_divider_ops;
                mux_ops = &imx8m_clk_composite_mux_ops;
+       } else if (composite_flags & IMX_COMPOSITE_BUS) {
+               div->shift = PCG_PREDIV_SHIFT;
+               div->width = PCG_PREDIV_WIDTH;
+               divider_ops = &imx8m_clk_composite_divider_ops;
+               mux_ops = &imx8m_clk_composite_mux_ops;
        } else {
                div->shift = PCG_PREDIV_SHIFT;
                div->width = PCG_PREDIV_WIDTH;

diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index b91b1b18a4a21e193ff45e38a48d9f8d497f9157..16adbc34e05fa6be8355dce38f2c88d1ea781270 100644 (file)
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -527,6 +527,7 @@ struct clk_hw *imx_clk_hw_cpu(const char *name, const char *parent_name,
                struct clk *step);
 
 #define IMX_COMPOSITE_CORE     BIT(0)
+#define IMX_COMPOSITE_BUS      BIT(1)
 
 struct clk_hw *imx8m_clk_hw_composite_flags(const char *name,
                                            const char * const *parent_names,
@@ -535,6 +536,12 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name,
                                            u32 composite_flags,
                                            unsigned long flags);
 
+#define imx8m_clk_hw_composite_bus(name, parent_names, reg)    \
+       imx8m_clk_hw_composite_flags(name, parent_names, \
+                       ARRAY_SIZE(parent_names), reg, \
+                       IMX_COMPOSITE_BUS, \
+                       CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE)
+
 #define imx8m_clk_hw_composite_core(name, parent_names, reg)   \
        imx8m_clk_hw_composite_flags(name, parent_names, \
                        ARRAY_SIZE(parent_names), reg, \