]> git.baikalelectronics.ru Git - arm-tf.git/commitdiff
plat:qti Mandate SMC implementaion and bug fix
authorSaurabh Gorecha <sgorecha@codeaurora.org>
Wed, 14 Oct 2020 18:41:15 +0000 (00:11 +0530)
committerSaurabh Gorecha <sgorecha@codeaurora.org>
Thu, 15 Oct 2020 20:53:35 +0000 (02:23 +0530)
implementation of SMC call SMCCC_ARCH_SOC_ID
adding debugging logs in mem assign call.
Checking range of param in mem_assign call is from CB_MEM_RAM
or CB_MEM_RESERVED.

Change-Id: Iba51bff154df01e02dcb7715582ffaff7beba26e
Signed-off-by: Saurabh Gorecha <sgorecha@codeaurora.org>
plat/qti/common/inc/qti_board_def.h
plat/qti/common/src/qti_common.c
plat/qti/common/src/qti_syscall.c
plat/qti/qtiseclib/inc/sc7180/qtiseclib_defs_plat.h
plat/qti/sc7180/inc/platform_def.h

index 4c84661b70ce6d9d46ddab207f1b87e54620a425..c95e4c0c30e38f3bf86d0f02627b51dddf18e71c 100644 (file)
  * development platforms
  */
 
+/*
+ * Defines used to retrieve QTI SOC Version
+ */
+#define JEDEC_QTI_BKID U(0x0)
+#define JEDEC_QTI_MFID U(0x70)
+#define QTI_SOC_CONTINUATION_SHIFT     U(24)
+#define QTI_SOC_IDENTIFICATION_SHIFT   U(16)
+
 /* Size of cacheable stacks */
 #define PLATFORM_STACK_SIZE    0x1000
 
index ff0fa3060f23e73832d122b5410094761b5f3e01..9355eb774a0a1a898a0ec85653f33a6159856ef8 100644 (file)
 #include <stdint.h>
 
 #include <common/debug.h>
+#include <lib/mmio.h>
+#include <lib/smccc.h>
 #include <lib/xlat_tables/xlat_tables_v2.h>
+#include <services/arm_arch_svc.h>
 
 #include <platform_def.h>
 #include <qti_plat.h>
@@ -146,3 +149,46 @@ int qti_mmap_remove_dynamic_region(uintptr_t base_va, size_t size)
        qti_align_mem_region(base_va, size, &base_va, &size);
        return mmap_remove_dynamic_region(base_va, size);
 }
+
+/*
+ * This function returns soc version which mainly consist of below fields
+ *
+ * soc_version[30:24] = JEP-106 continuation code for the SiP
+ * soc_version[23:16] = JEP-106 identification code with parity bit for the SiP
+ * soc_version[0:15]  = Implementation defined SoC ID
+ */
+int32_t plat_get_soc_version(void)
+{
+       uint32_t soc_version = (QTI_SOC_VERSION & QTI_SOC_VERSION_MASK);
+       uint32_t jep106az_code = (JEDEC_QTI_BKID << QTI_SOC_CONTINUATION_SHIFT)
+                        | (JEDEC_QTI_MFID << QTI_SOC_IDENTIFICATION_SHIFT);
+       return (int32_t)(jep106az_code | (soc_version));
+}
+
+/*
+ * This function returns soc revision in below format
+ *
+ *   soc_revision[0:30] = SOC revision of specific SOC
+ */
+int32_t plat_get_soc_revision(void)
+{
+       return mmio_read_32(QTI_SOC_REVISION_REG) & QTI_SOC_REVISION_MASK;
+}
+
+/*****************************************************************************
+ * plat_smccc_feature_available() - This function checks whether SMCCC feature
+ *                                  is availabile for the platform or not.
+ * @fid: SMCCC function id
+ *
+ * Return SMC_ARCH_CALL_SUCCESS if SMCCC feature is available and
+ * SMC_ARCH_CALL_NOT_SUPPORTED otherwise.
+ *****************************************************************************/
+int32_t plat_smccc_feature_available(u_register_t fid)
+{
+       switch (fid) {
+       case SMCCC_ARCH_SOC_ID:
+               return SMC_ARCH_CALL_SUCCESS;
+       default:
+               return SMC_ARCH_CALL_NOT_SUPPORTED;
+       }
+}
index 27c48959f852e94139303f875c49d714c543213b..a7601b65778710e40cf550bfaa2f934fb8ae7be3 100644 (file)
@@ -27,7 +27,7 @@
  */
 #define        QTI_SIP_SVC_CALL_COUNT_ID                       U(0x0200ff00)
 #define        QTI_SIP_SVC_UID_ID                              U(0x0200ff01)
-/*                                                     0x8200ff02 is reserved */
+/*                                                     0x8200ff02 is reserved*/
 #define        QTI_SIP_SVC_VERSION_ID                          U(0x0200ff03)
 
 /*
@@ -97,37 +97,52 @@ bool qti_mem_assign_validate_param(memprot_info_t *mem_info,
            || (src_vm_list_cnt >= QTI_VM_LAST) || (dst_vm_list_cnt == 0)
            || (dst_vm_list_cnt >= QTI_VM_LAST) || (u_num_mappings == 0)
            || u_num_mappings > QTI_VM_MAX_LIST_SIZE) {
+               ERROR("vm count is 0 or more then QTI_VM_LAST or empty list\n");
+               ERROR("source_vm_list %p dest_vm_list %p mem_info %p src_vm_list_cnt %u dst_vm_list_cnt %u u_num_mappings %u\n",
+                    source_vm_list, dest_vm_list, mem_info,
+                    (unsigned int)src_vm_list_cnt,
+                    (unsigned int)dst_vm_list_cnt,
+                    (unsigned int)u_num_mappings);
                return false;
        }
        for (i = 0; i < u_num_mappings; i++) {
                if ((mem_info[i].mem_addr & (SIZE4K - 1))
+                   || (mem_info[i].mem_size == 0)
                    || (mem_info[i].mem_size & (SIZE4K - 1))) {
+                       ERROR("mem_info passed buffer 0x%x or size 0x%x is not 4k aligned\n",
+                            (unsigned int)mem_info[i].mem_addr,
+                            (unsigned int)mem_info[i].mem_size);
                        return false;
                }
 
                if ((mem_info[i].mem_addr + mem_info[i].mem_size) <
                    mem_info[i].mem_addr) {
+                       ERROR("overflow in mem_addr 0x%x add mem_size 0x%x\n",
+                             (unsigned int)mem_info[i].mem_addr,
+                             (unsigned int)mem_info[i].mem_size);
                        return false;
                }
-               if (coreboot_get_memory_type(mem_info[i].mem_addr) !=
-                   CB_MEM_RAM) {
+               coreboot_memory_t mem_type = coreboot_get_memory_type(
+                                               mem_info[i].mem_addr,
+                                               mem_info[i].mem_size);
+               if (mem_type != CB_MEM_RAM && mem_type != CB_MEM_RESERVED) {
+                       ERROR("memory region not in CB MEM RAM or RESERVED area: region start 0x%x size 0x%x\n",
+                            (unsigned int)mem_info[i].mem_addr,
+                            (unsigned int)mem_info[i].mem_size);
                        return false;
                }
-
-               if (coreboot_get_memory_type
-                   (mem_info[i].mem_addr + mem_info[i].mem_size) !=
-                   CB_MEM_RAM) {
-                       return false;
-               }
-
        }
        for (i = 0; i < src_vm_list_cnt; i++) {
                if (source_vm_list[i] >= QTI_VM_LAST) {
+                       ERROR("source_vm_list[%d] 0x%x is more then QTI_VM_LAST\n",
+                             i, (unsigned int)source_vm_list[i]);
                        return false;
                }
        }
        for (i = 0; i < dst_vm_list_cnt; i++) {
                if (dest_vm_list[i].dst_vm >= QTI_VM_LAST) {
+                       ERROR("dest_vm_list[%d] 0x%x is more then QTI_VM_LAST\n",
+                             i, (unsigned int)dest_vm_list[i].dst_vm);
                        return false;
                }
        }
@@ -150,6 +165,7 @@ static uintptr_t qti_sip_mem_assign(void *handle, uint32_t smc_cc,
        }
        /* Validate input arg count & retrieve arg3-6 from NS Buffer. */
        if ((x1 != QTI_SIP_SVC_MEM_ASSIGN_PARAM_ID) || (x5 == 0x0)) {
+               ERROR("invalid mem_assign param id or no mapping info\n");
                goto unmap_return;
        }
 
@@ -160,6 +176,8 @@ static uintptr_t qti_sip_mem_assign(void *handle, uint32_t smc_cc,
                 SMC_32) ? (sizeof(uint32_t) * 4) : (sizeof(uint64_t) * 4);
        if (qti_mmap_add_dynamic_region(dyn_map_start, dyn_map_size,
                                (MT_NS | MT_RO_DATA)) != 0) {
+               ERROR("map failed for params NS Buffer %x %x\n",
+                     (unsigned int)dyn_map_start, (unsigned int)dyn_map_size);
                goto unmap_return;
        }
        /* Retrieve indirect args. */
@@ -174,6 +192,8 @@ static uintptr_t qti_sip_mem_assign(void *handle, uint32_t smc_cc,
        }
        /* Un-Map NS Buffer. */
        if (qti_mmap_remove_dynamic_region(dyn_map_start, dyn_map_size) != 0) {
+               ERROR("unmap failed for params NS Buffer %x %x\n",
+                     (unsigned int)dyn_map_start, (unsigned int)dyn_map_size);
                goto unmap_return;
        }
 
@@ -191,6 +211,8 @@ static uintptr_t qti_sip_mem_assign(void *handle, uint32_t smc_cc,
 
        if (qti_mmap_add_dynamic_region(dyn_map_start, dyn_map_size,
                                        (MT_NS | MT_RO_DATA)) != 0) {
+               ERROR("map failed for params NS Buffer2 %x %x\n",
+                     (unsigned int)dyn_map_start, (unsigned int)dyn_map_size);
                goto unmap_return;
        }
        memprot_info_t *mem_info_p = (memprot_info_t *) x2;
@@ -205,6 +227,7 @@ static uintptr_t qti_sip_mem_assign(void *handle, uint32_t smc_cc,
                                source_vm_list_p, src_vm_list_cnt,
                                dest_vm_list_p,
                                dst_vm_list_cnt) != true) {
+               ERROR("Param validation failed\n");
                goto unmap_return;
        }
 
@@ -219,8 +242,7 @@ static uintptr_t qti_sip_mem_assign(void *handle, uint32_t smc_cc,
 
        for (int i = 0; i < dst_vm_list_cnt; i++) {
                dest_vm_list[i].dst_vm = dest_vm_list_p[i].dst_vm;
-               dest_vm_list[i].dst_vm_perm =
-                       dest_vm_list_p[i].dst_vm_perm;
+               dest_vm_list[i].dst_vm_perm = dest_vm_list_p[i].dst_vm_perm;
                dest_vm_list[i].ctx = dest_vm_list_p[i].ctx;
                dest_vm_list[i].ctx_size = dest_vm_list_p[i].ctx_size;
        }
@@ -233,6 +255,8 @@ static uintptr_t qti_sip_mem_assign(void *handle, uint32_t smc_cc,
        /* Un-Map NS Buffers. */
        if (qti_mmap_remove_dynamic_region(dyn_map_start,
                                dyn_map_size) != 0) {
+               ERROR("unmap failed for params NS Buffer %x %x\n",
+                     (unsigned int)dyn_map_start, (unsigned int)dyn_map_size);
                goto unmap_return;
        }
        /* Invoke API lib api. */
index c695c190ddd947ddb54090e45d90b1ff352aaa66..3ecee2022cd4463d0810b3c3a5297e2362811d5e 100644 (file)
 #define BL31_BASE                                              0x80b00000
 #define BL31_SIZE                                              0x00100000
 
-/*----------------------------------------------------------------------------*/
-/* AOP CMD DB  address space for mapping */
-/*----------------------------------------------------------------------------*/
-#define QTI_AOP_CMD_DB_BASE                    0x80820000
-#define QTI_AOP_CMD_DB_SIZE                    0x00020000
-
 /* Chipset specific secure interrupt number/ID defs. */
 #define QTISECLIB_INT_ID_SEC_WDOG_BARK                 (0x204)
 #define QTISECLIB_INT_ID_NON_SEC_WDOG_BITE             (0x21)
index 17e1310b08b32fbc36fa832f47a553fc4d2549ee..b0798a63f70e1aca8dd9c98e5476501569c3b61c 100644 (file)
 /*----------------------------------------------------------------------------*/
 #define QTI_PS_HOLD_REG                                0x0C264000
 /*----------------------------------------------------------------------------*/
+/* AOP CMD DB  address space for mapping */
+/*----------------------------------------------------------------------------*/
+#define QTI_AOP_CMD_DB_BASE                    0x80820000
+#define QTI_AOP_CMD_DB_SIZE                    0x00020000
+/*----------------------------------------------------------------------------*/
+/* SOC hw version register */
+/*----------------------------------------------------------------------------*/
+#define QTI_SOC_VERSION                                U(0x7180)
+#define QTI_SOC_VERSION_MASK                   U(0xFFFF)
+#define QTI_SOC_REVISION_REG                   0x1FC8000
+#define QTI_SOC_REVISION_MASK                  U(0xFFFF)
+/*----------------------------------------------------------------------------*/
 
 #endif /* PLATFORM_DEF_H */