riscv: use BIT() macros in t-head errata init

Using the appropriate BIT macro makes the code better readable.

Suggested-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20220905111027.2463297-4-heiko@sntech.de
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
index bffa711aaf647fc43463a85f7f617cf2058b3bc8..a6f4bd8ccf3f8fb489cc7571d6fc60c7e1a00334 100644 (file)
--- a/arch/riscv/errata/thead/errata.c
+++ b/arch/riscv/errata/thead/errata.c
@@ -49,10 +49,10 @@ static u32 thead_errata_probe(unsigned int stage,
        u32 cpu_req_errata = 0;
 
        if (errata_probe_pbmt(stage, archid, impid))
-               cpu_req_errata |= (1U << ERRATA_THEAD_PBMT);
+               cpu_req_errata |= BIT(ERRATA_THEAD_PBMT);
 
        if (errata_probe_cmo(stage, archid, impid))
-               cpu_req_errata |= (1U << ERRATA_THEAD_CMO);
+               cpu_req_errata |= BIT(ERRATA_THEAD_CMO);
 
        return cpu_req_errata;
 }