]> git.baikalelectronics.ru Git - uboot.git/commitdiff
MIPS: remove CONFIG_SYS_MHZ
authorDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Sun, 10 Jul 2022 15:15:12 +0000 (17:15 +0200)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Wed, 2 Nov 2022 20:42:32 +0000 (21:42 +0100)
Resolve all uses of CONFIG_SYS_MHZ with the currently defined value.
Remove code which depends on CONFIG_SYS_MHZ but where no board configs
actually use that code.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
arch/mips/mach-jz47xx/include/mach/jz4780.h
arch/mips/mach-jz47xx/jz4780/pll.c
board/imgtec/ci20/ci20.c
include/configs/ap121.h
include/configs/ap143.h
include/configs/ap152.h
include/configs/ci20.h
include/configs/malta.h
include/configs/tplink_wdr4300.h
scripts/config_whitelist.txt

index 4422e503ed2af296d8088a5f4f9df0a1a01ebd9e..880445dac396ea7f7513b5167303afb5834f9b54 100644 (file)
@@ -60,7 +60,7 @@
 
 /* PLL setup */
 #define JZ4780_SYS_EXTAL       48000000
-#define JZ4780_SYS_MEM_SPEED   (CONFIG_SYS_MHZ * 1000000)
+#define JZ4780_SYS_MEM_SPEED   (1200 * 1000000)
 #define JZ4780_SYS_MEM_DIV     3
 #define JZ4780_SYS_AUDIO_SPEED (768 * 1000000)
 
index 323c634fb32250327ff703c32d0ec3f01305bb37..4519b478ccb08d63b068fba233b6c2695322dfd0 100644 (file)
@@ -399,11 +399,7 @@ static void cpu_mux_select(int pll)
                        ((2 - 1) << CPM_CPCCR_L2DIV_BIT) |
                        ((1 - 1) << CPM_CPCCR_CDIV_BIT);
 
-       if (CONFIG_SYS_MHZ >= 1000)
-               clk_ctrl |= (12 - 1) << CPM_CPCCR_PDIV_BIT;
-       else
-               clk_ctrl |= (6 - 1) << CPM_CPCCR_PDIV_BIT;
-
+       clk_ctrl |= (12 - 1) << CPM_CPCCR_PDIV_BIT;
        clrsetbits_le32(cpm_regs + CPM_CPCCR, 0x00ffffff, clk_ctrl);
 
        while (readl(cpm_regs + CPM_CPCSR) & (CPM_CPCSR_CDIV_BUSY |
index 7cbe49abd93b6e4395f99502c20e2c81bd781ac9..89f5e7ad792c905d61c7156e02e0b5070327190c 100644 (file)
@@ -350,10 +350,6 @@ static const struct jz4780_ddr_config H5TQ2G83CFR_48_config = {
        .pulldn = 0x0e,
 };
 
-#if (CONFIG_SYS_MHZ != 1200)
-#error No DDR configuration for CPU speed
-#endif
-
 const struct jz4780_ddr_config *jz4780_get_ddr_config(void)
 {
        const int board_revision = ci20_revision();
index 099aac5421978ca6616eec5e64de95200f2d3cf8..61cc073a8a558fb882e3e9630a608580aca4f2d3 100644 (file)
@@ -6,8 +6,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MHZ                  200
-#define CONFIG_SYS_MIPS_TIMER_FREQ      (CONFIG_SYS_MHZ * 1000000)
+#define CONFIG_SYS_MIPS_TIMER_FREQ      200000000
 
 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 
index 60b9e779fa926773e231383bc620ba53e1e047a0..579b9b4f2c028f67c0138a373b4763229551d043 100644 (file)
@@ -6,8 +6,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MHZ                  325
-#define CONFIG_SYS_MIPS_TIMER_FREQ      (CONFIG_SYS_MHZ * 1000000)
+#define CONFIG_SYS_MIPS_TIMER_FREQ      325000000
 
 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 
index d165ead7bb4d1852c23ed7b542f0a23e529bf4f0..283762fd220b99700f6ab55c1e0dd2371fbecb3c 100644 (file)
@@ -6,8 +6,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MHZ                  375
-#define CONFIG_SYS_MIPS_TIMER_FREQ      (CONFIG_SYS_MHZ * 1000000)
+#define CONFIG_SYS_MIPS_TIMER_FREQ      375000000
 
 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 
index 192da015e188b18332d6aa6739364198c349a3db..7e8a9fcb801ce3f5378f0013fe73e9539942100c 100644 (file)
@@ -10,8 +10,7 @@
 #define __CONFIG_CI20_H__
 
 /* Ingenic JZ4780 clock configuration. */
-#define CONFIG_SYS_MHZ                 1200
-#define CONFIG_SYS_MIPS_TIMER_FREQ     (CONFIG_SYS_MHZ * 1000000)
+#define CONFIG_SYS_MIPS_TIMER_FREQ     1200000000
 
 /* Memory configuration */
 #define CONFIG_SYS_MONITOR_LEN         (512 * 1024)
index 5a42ceef21218fe1f39ca18a12a3b1a0b7a48563..080d8aa862c9cbe6de556e80816e85ef8dfeff1a 100644 (file)
@@ -18,8 +18,7 @@
 /*
  * CPU Configuration
  */
-#define CONFIG_SYS_MHZ                 250     /* arbitrary value */
-#define CONFIG_SYS_MIPS_TIMER_FREQ     (CONFIG_SYS_MHZ * 1000000)
+#define CONFIG_SYS_MIPS_TIMER_FREQ     250000000
 
 /*
  * Memory map
index f5466fd5092daf89101f25b2458c99a19ff24d9e..1400a211e3ad05eaa1a3f61dd6803bcba4741f21 100644 (file)
@@ -6,8 +6,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MHZ                 280
-#define CONFIG_SYS_MIPS_TIMER_FREQ     (CONFIG_SYS_MHZ * 1000000)
+#define CONFIG_SYS_MIPS_TIMER_FREQ     280000000
 
 #define CONFIG_SYS_SDRAM_BASE          0xa0000000
 
index 185565247710b8ff92dc7c9b7138a2fa60816419..e679df4f15e2a4b6e0a4e5b029a6e49646c92a3f 100644 (file)
@@ -872,7 +872,6 @@ CONFIG_SYS_MDIO1_OFFSET
 CONFIG_SYS_MEMORY_BASE
 CONFIG_SYS_MEM_RESERVE_SECURE
 CONFIG_SYS_MFD
-CONFIG_SYS_MHZ
 CONFIG_SYS_MIPS_TIMER_FREQ
 CONFIG_SYS_MMC_CD_PIN
 CONFIG_SYS_MMC_CLK_OD