Revert "ARM: imx6: Disable DDR DRAM calibration DHCOM i.MX6 PDK"

This reverts commit e135ac7c3cd919f16792a854de698dc6c2344a5d.

The DDR DRAM calibration was enhanced by write leveling correction code.
It can be used with T-topology now.

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>

diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
index dffe4ebd4525b2605fde8ae50787044394076ca4..beda38955ef44288bb6d2fad2240c0edaa42f304 100644 (file)
--- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c
+++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
@@ -384,6 +384,10 @@ void board_init_f(ulong dummy)
                                  &dhcom6sdl_grp_ioregs);
        mx6_dram_cfg(&dhcom_ddr_info, &dhcom_mmdc_calib, &dhcom_mem_ddr);
 
+       /* Perform DDR DRAM calibration */
+       udelay(100);
+       mmdc_do_dqs_calibration(&dhcom_ddr_info);
+
        /* Clear the BSS. */
        memset(__bss_start, 0, __bss_end - __bss_start);