]> git.baikalelectronics.ru Git - kernel.git/commitdiff
drm/amdgpu: add a helper function to decode iv
authorHawking Zhang <Hawking.Zhang@amd.com>
Wed, 25 Nov 2020 07:25:51 +0000 (15:25 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 23 Dec 2020 20:05:07 +0000 (15:05 -0500)
since from soc15, all the chips share the same
iv format. create a common helper to decode iv

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Dennis Li <Dennis.Li@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h

index dcd9b4a8e20bef0932376e0e9acaa4cbba3bbdab..725a9c73d51f0b4c9029ccf973b671334a9a54cd 100644 (file)
@@ -205,3 +205,46 @@ restart_ih:
        return IRQ_HANDLED;
 }
 
+/**
+ * amdgpu_ih_decode_iv_helper - decode an interrupt vector
+ *
+ * @adev: amdgpu_device pointer
+ *
+ * Decodes the interrupt vector at the current rptr
+ * position and also advance the position for for Vega10
+ * and later GPUs.
+ */
+void amdgpu_ih_decode_iv_helper(struct amdgpu_device *adev,
+                               struct amdgpu_ih_ring *ih,
+                               struct amdgpu_iv_entry *entry)
+{
+       /* wptr/rptr are in bytes! */
+       u32 ring_index = ih->rptr >> 2;
+       uint32_t dw[8];
+
+       dw[0] = le32_to_cpu(ih->ring[ring_index + 0]);
+       dw[1] = le32_to_cpu(ih->ring[ring_index + 1]);
+       dw[2] = le32_to_cpu(ih->ring[ring_index + 2]);
+       dw[3] = le32_to_cpu(ih->ring[ring_index + 3]);
+       dw[4] = le32_to_cpu(ih->ring[ring_index + 4]);
+       dw[5] = le32_to_cpu(ih->ring[ring_index + 5]);
+       dw[6] = le32_to_cpu(ih->ring[ring_index + 6]);
+       dw[7] = le32_to_cpu(ih->ring[ring_index + 7]);
+
+       entry->client_id = dw[0] & 0xff;
+       entry->src_id = (dw[0] >> 8) & 0xff;
+       entry->ring_id = (dw[0] >> 16) & 0xff;
+       entry->vmid = (dw[0] >> 24) & 0xf;
+       entry->vmid_src = (dw[0] >> 31);
+       entry->timestamp = dw[1] | ((u64)(dw[2] & 0xffff) << 32);
+       entry->timestamp_src = dw[2] >> 31;
+       entry->pasid = dw[3] & 0xffff;
+       entry->pasid_src = dw[3] >> 31;
+       entry->src_data[0] = dw[4];
+       entry->src_data[1] = dw[5];
+       entry->src_data[2] = dw[6];
+       entry->src_data[3] = dw[7];
+
+       /* wptr/rptr are in bytes! */
+       ih->rptr += 32;
+}
index 94c565b9eca8180027c950ec637fc4b2076cda0e..6ed4a85fc7c31e7916472257dc243a6d2c09afc3 100644 (file)
@@ -88,5 +88,7 @@ void amdgpu_ih_ring_fini(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih);
 void amdgpu_ih_ring_write(struct amdgpu_ih_ring *ih, const uint32_t *iv,
                          unsigned int num_dw);
 int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih);
-
+void amdgpu_ih_decode_iv_helper(struct amdgpu_device *adev,
+                               struct amdgpu_ih_ring *ih,
+                               struct amdgpu_iv_entry *entry);
 #endif