feat(imx8m): add more dram pll setting

Add DRAM PLL frequency setting for 3200mts & 4000mts.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Change-Id: I4b0609f9e7c0f35d75a26ec9ccebec77b3dbe68f

diff --git a/plat/imx/imx8m/ddr/clock.c b/plat/imx/imx8m/ddr/clock.c
index 7fb5730dc1ae2b792aeb119ec16e2dbe60caa2a2..986ba6139c7d2dd35c556dbaaf0bc703f2762797 100644 (file)
--- a/plat/imx/imx8m/ddr/clock.c
+++ b/plat/imx/imx8m/ddr/clock.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2018-2022 NXP
+ * Copyright 2018-2023 NXP
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -88,6 +88,12 @@ void dram_pll_init(unsigned int drate)
        mmio_clrbits_32(DRAM_PLL_CTRL, (1 << 9));
 
        switch (drate) {
+       case 4000:
+               mmio_write_32(DRAM_PLL_CTRL + 0x4, (250 << 12) | (3 << 4) | 1);
+               break;
+       case 3200:
+               mmio_write_32(DRAM_PLL_CTRL + 0x4, (200 << 12) | (3 << 4) | 1);
+               break;
        case 2400:
                mmio_write_32(DRAM_PLL_CTRL + 0x4, (300 << 12) | (3 << 4) | 2);
                break;