In discrete cards, the graphics driver shouldn't proceed with the probe
or resume unless PCODE indicated everything is done, including memory
training and gt bring up.
For this reason, the driver probe and resume paths needs to be blocked
until PCODE indicates it is done. Also, it needs to aborted if the
notification never arrives.
In general, the few miliseconds would be enough and the regular PCODE
recommendation for the timeout was 10 seconds. However there are some
rare cases where this initialization can take up to 1 minute. So,
PCODE has increased the recommendation to 3 minutes so we don't fully
block the device utilization when something just got delayed for
whatever reason. To be on the safest side, let's accept this
recommendation, since on the regular case it won't delay or block the
driver initialization and resume flows
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210727173338.901264-1-badal.nilawar@intel.com
intel_opregion_setup(dev_priv);
- intel_pcode_init(dev_priv);
+ ret = intel_pcode_init(dev_priv);
+ if (ret)
+ goto err_msi;
/*
* Fill the dram structure to get the system dram info. This will be
disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
+ ret = intel_pcode_init(dev_priv);
+ if (ret)
+ return ret;
+
sanitize_gpu(dev_priv);
ret = i915_ggtt_enable_hw(dev_priv);
#undef COND
}
-void intel_pcode_init(struct drm_i915_private *i915)
+int intel_pcode_init(struct drm_i915_private *i915)
{
- int ret;
+ int ret = 0;
if (!IS_DGFX(i915))
- return;
+ return ret;
ret = skl_pcode_request(i915, DG1_PCODE_STATUS,
DG1_UNCORE_GET_INIT_STATUS,
DG1_UNCORE_INIT_STATUS_COMPLETE,
- DG1_UNCORE_INIT_STATUS_COMPLETE, 50);
+ DG1_UNCORE_INIT_STATUS_COMPLETE, 180000);
+
+ drm_dbg(&i915->drm, "PCODE init status %d\n", ret);
+
if (ret)
drm_err(&i915->drm, "Pcode did not report uncore initialization completion!\n");
+
+ return ret;
}
int skl_pcode_request(struct drm_i915_private *i915, u32 mbox, u32 request,
u32 reply_mask, u32 reply, int timeout_base_ms);
-void intel_pcode_init(struct drm_i915_private *i915);
+int intel_pcode_init(struct drm_i915_private *i915);
#endif /* _INTEL_SIDEBAND_H */