drm/i915/icp: Add Wa_14010685332

We need to toggle a SDE chicken bit on and then off as the final
step when disabling interrupts in preparation for runtime suspend.

Bspec: 33450
Bspec: 8402
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200501213701.371443-1-matthew.d.roper@intel.com
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 0b8b0c069ce34ee92ae41ba8a845bbf591b4e1e4..ea4c87784a27fe96c1ab02f7eb2cf0e2496cb2c4 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2870,6 +2870,14 @@ static void gen11_display_irq_reset(struct drm_i915_private *dev_priv)
 
        if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
                GEN3_IRQ_RESET(uncore, SDE);
+
+       /* Wa_14010685332:icl */
+       if (INTEL_PCH_TYPE(dev_priv) == PCH_ICP) {
+               intel_uncore_rmw(uncore, SOUTH_CHICKEN1,
+                                SBCLK_RUN_REFCLK_DIS, SBCLK_RUN_REFCLK_DIS);
+               intel_uncore_rmw(uncore, SOUTH_CHICKEN1,
+                                SBCLK_RUN_REFCLK_DIS, 0);
+       }
 }
 
 static void gen11_irq_reset(struct drm_i915_private *dev_priv)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index f23a18ee28f9b6277266b93c7d1f102c69011545..fde54b86ea207663bd748513c138d9bdc980f9cf 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8573,6 +8573,7 @@ enum {
 #define  FDI_BC_BIFURCATION_SELECT     (1 << 12)
 #define  CHASSIS_CLK_REQ_DURATION_MASK (0xf << 8)
 #define  CHASSIS_CLK_REQ_DURATION(x)   ((x) << 8)
+#define  SBCLK_RUN_REFCLK_DIS          (1 << 7)
 #define  SPT_PWM_GRANULARITY           (1 << 0)
 #define SOUTH_CHICKEN2         _MMIO(0xc2004)
 #define  FDI_MPHY_IOSFSB_RESET_STATUS  (1 << 13)