crypto: octeontx2 - add firmware version in devlink info

Added running firmware version information of AE, SE and IE components
in devlink info.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/marvell/octeontx2/otx2_cpt_devlink.c b/drivers/crypto/marvell/octeontx2/otx2_cpt_devlink.c
index bb02e0db3615366f301f431ae822bfa215a791af..7503f6b18ac56c5817629403565cb08daaa452bb 100644 (file)
--- a/drivers/crypto/marvell/octeontx2/otx2_cpt_devlink.c
+++ b/drivers/crypto/marvell/octeontx2/otx2_cpt_devlink.c
@@ -51,11 +51,47 @@ static const struct devlink_param otx2_cpt_dl_params[] = {
                             NULL),
 };
 
-static int otx2_cpt_devlink_info_get(struct devlink *devlink,
+static int otx2_cpt_dl_info_firmware_version_put(struct devlink_info_req *req,
+                                                struct otx2_cpt_eng_grp_info grp[],
+                                                const char *ver_name, int eng_type)
+{
+       struct otx2_cpt_engs_rsvd *eng;
+       int i;
+
+       for (i = 0; i < OTX2_CPT_MAX_ENGINE_GROUPS; i++) {
+               eng = find_engines_by_type(&grp[i], eng_type);
+               if (eng)
+                       return devlink_info_version_running_put(req, ver_name,
+                                                               eng->ucode->ver_str);
+       }
+
+       return 0;
+}
+
+static int otx2_cpt_devlink_info_get(struct devlink *dl,
                                     struct devlink_info_req *req,
                                     struct netlink_ext_ack *extack)
 {
-       return devlink_info_driver_name_put(req, "rvu_cptpf");
+       struct otx2_cpt_devlink *cpt_dl = devlink_priv(dl);
+       struct otx2_cptpf_dev *cptpf = cpt_dl->cptpf;
+       int err;
+
+       err = devlink_info_driver_name_put(req, "rvu_cptpf");
+       if (err)
+               return err;
+
+       err = otx2_cpt_dl_info_firmware_version_put(req, cptpf->eng_grps.grp,
+                                                   "fw.ae", OTX2_CPT_AE_TYPES);
+       if (err)
+               return err;
+
+       err = otx2_cpt_dl_info_firmware_version_put(req, cptpf->eng_grps.grp,
+                                                   "fw.se", OTX2_CPT_SE_TYPES);
+       if (err)
+               return err;
+
+       return otx2_cpt_dl_info_firmware_version_put(req, cptpf->eng_grps.grp,
+                                                   "fw.ie", OTX2_CPT_IE_TYPES);
 }
 
 static const struct devlink_ops otx2_cpt_devlink_ops = {

diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c b/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
index 9cba2f714c7e16232aa35d62e10bf52ae6142074..46ffb7ae982c5afd5a06127bb70ebc3cbd5e21ef 100644 (file)
--- a/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
+++ b/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
@@ -476,7 +476,7 @@ release_fw:
        return ret;
 }
 
-static struct otx2_cpt_engs_rsvd *find_engines_by_type(
+struct otx2_cpt_engs_rsvd *find_engines_by_type(
                                        struct otx2_cpt_eng_grp_info *eng_grp,
                                        int eng_type)
 {

diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.h b/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.h
index 8f4d4e5f531a697517c754be6608d579c43b47a6..e69320a54b5d5f29201769962d306df82cf199eb 100644 (file)
--- a/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.h
+++ b/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.h
@@ -166,4 +166,7 @@ int otx2_cpt_dl_custom_egrp_create(struct otx2_cptpf_dev *cptpf,
 int otx2_cpt_dl_custom_egrp_delete(struct otx2_cptpf_dev *cptpf,
                                   struct devlink_param_gset_ctx *ctx);
 void otx2_cpt_print_uc_dbg_info(struct otx2_cptpf_dev *cptpf);
+struct otx2_cpt_engs_rsvd *find_engines_by_type(
+                                       struct otx2_cpt_eng_grp_info *eng_grp,
+                                       int eng_type);
 #endif /* __OTX2_CPTPF_UCODE_H */