drm/i915/execlists: Assert tasklet is locked for process_csb()

We rely on only the tasklet being allowed to call into process_csb(), so
assert that is locked when we do. As the tasklet uses a simple bitlock,
there is no strong lockdep checking so we must make do with a plain
assertion that the tasklet is running and assume that we are the
tasklet!

v2: Fixup intel_gt_sanitize() to prepare each engine for the reset so
that the locks are marked as held during the reset
v3: Check for existent function pointers for very early sanitisation.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191014121336.30137-1-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index 87e34e0b6427851600f1cf9b75ee463b097b1f79..bd1bd3e00a94085cd8754f3007bb50b2894f0cbf 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -136,11 +136,18 @@ void intel_gt_sanitize(struct intel_gt *gt, bool force)
 
        intel_uc_sanitize(&gt->uc);
 
-       if (!reset_engines(gt) && !force)
-               return;
+       for_each_engine(engine, gt->i915, id)
+               if (engine->reset.prepare)
+                       engine->reset.prepare(engine);
+
+       if (reset_engines(gt) || force) {
+               for_each_engine(engine, gt->i915, id)
+                       __intel_engine_reset(engine, false);
+       }
 
        for_each_engine(engine, gt->i915, id)
-               __intel_engine_reset(engine, false);
+               if (engine->reset.finish)
+                       engine->reset.finish(engine);
 }
 
 void intel_gt_pm_disable(struct intel_gt *gt)

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index ee21307ab5fe579ecc3251df712b2b43f942c00b..26b6b699193b4009bc55f18da07ca32d1254e47b 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1842,6 +1842,13 @@ static void process_csb(struct intel_engine_cs *engine)
        const u8 num_entries = execlists->csb_size;
        u8 head, tail;
 
+       /*
+        * As we modify our execlists state tracking we require exclusive
+        * access. Either we are inside the tasklet, or the tasklet is disabled
+        * and we assume that is only inside the reset paths and so serialised.
+        */
+       GEM_BUG_ON(!tasklet_is_locked(&execlists->tasklet) &&
+                  !reset_in_progress(execlists));
        GEM_BUG_ON(USES_GUC_SUBMISSION(engine->i915));
 
        /*

diff --git a/drivers/gpu/drm/i915/i915_gem.h b/drivers/gpu/drm/i915/i915_gem.h
index db20d2b0842b4ba44b8691780275217654914a92..f6f9675848b8e4b77fbcb2eb163a852cfb24850e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem.h
+++ b/drivers/gpu/drm/i915/i915_gem.h
@@ -86,6 +86,11 @@ static inline void tasklet_lock(struct tasklet_struct *t)
                cpu_relax();
 }
 
+static inline bool tasklet_is_locked(const struct tasklet_struct *t)
+{
+       return test_bit(TASKLET_STATE_RUN, &t->state);
+}
+
 static inline void __tasklet_disable_sync_once(struct tasklet_struct *t)
 {
        if (!atomic_fetch_inc(&t->count))