uint8_t enable, uint32_t flag);
enum pm_ret_status pm_get_callbackdata(uint32_t *data, size_t count, uint32_t flag,
uint32_t ack);
+void pm_client_set_wakeup_sources(uint32_t node_id);
enum pm_ret_status pm_pll_set_param(uint32_t clk_id, uint32_t param,
uint32_t value, uint32_t flag);
enum pm_ret_status pm_pll_get_param(uint32_t clk_id, uint32_t param,
/*
* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020-2022, Xilinx, Inc. All rights reserved.
- * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved.
+ * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
void pm_client_abort_suspend(void);
void pm_client_wakeup(const struct pm_proc *proc);
+#if !defined(PLAT_zynqmp)
+enum pm_device_node_idx irq_to_pm_node_idx(uint32_t irq);
+#endif
+
/* Global variables to be set in pm_client.c */
extern const struct pm_proc *primary_proc;
* IPI interrupts
*/
+#include <drivers/arm/gic_common.h>
+#include <lib/mmio.h>
+#include <lib/utils.h>
+#include <plat/common/platform.h>
+#include <platform_def.h>
+#include <pm_api_sys.h>
+#include <pm_client.h>
#include <pm_common.h>
+#include <pm_defs.h>
#include <pm_ipi.h>
-#include <plat/common/platform.h>
-#include "pm_api_sys.h"
-#include "pm_client.h"
-#include "pm_defs.h"
#include "pm_svc_main.h"
+#define NUM_GICD_ISENABLER ((IRQ_MAX >> 5U) + 1U)
+
/* default shutdown/reboot scope is system(2) */
static uint32_t pm_shutdown_scope = XPM_SHUTDOWN_SUBTYPE_RST_SYSTEM;
/* PM API functions */
+/**
+ * pm_client_set_wakeup_sources - Set all devices with enabled interrupts as
+ * wake sources in the XilPM.
+ * @node_id: Node id of processor
+ */
+void pm_client_set_wakeup_sources(uint32_t node_id)
+{
+ uint32_t reg_num, device_id;
+ uint8_t pm_wakeup_nodes_set[XPM_NODEIDX_DEV_MAX] = {0U};
+ uintptr_t isenabler1 = PLAT_GICD_BASE_VALUE + GICD_ISENABLER + 4U;
+
+ zeromem(&pm_wakeup_nodes_set, (u_register_t)sizeof(pm_wakeup_nodes_set));
+
+ for (reg_num = 0U; reg_num < NUM_GICD_ISENABLER; reg_num++) {
+ uint32_t base_irq = reg_num << ISENABLER_SHIFT;
+ uint32_t reg = mmio_read_32(isenabler1 + (reg_num << 2));
+
+ if (reg == 0U) {
+ continue;
+ }
+
+ while (reg != 0U) {
+ enum pm_device_node_idx node_idx;
+ uint32_t idx, irq, lowest_set = reg & (-reg);
+ enum pm_ret_status ret;
+
+ idx = __builtin_ctz(lowest_set);
+ irq = base_irq + idx;
+
+ if (irq > IRQ_MAX) {
+ break;
+ }
+
+ node_idx = irq_to_pm_node_idx(irq);
+ reg &= ~lowest_set;
+
+ if ((node_idx > XPM_NODEIDX_DEV_MIN) && (node_idx < XPM_NODEIDX_DEV_MAX)) {
+ if (pm_wakeup_nodes_set[node_idx] == 0U) {
+ /* Get device ID from node index */
+ device_id = PERIPH_DEVID(node_idx);
+ ret = pm_set_wakeup_source(node_id,
+ device_id, 1U,
+ SECURE_FLAG);
+ pm_wakeup_nodes_set[node_idx] = (ret == PM_RET_SUCCESS) ?
+ 1U : 0U;
+ }
+ }
+ }
+ }
+}
+
/**
* pm_handle_eemi_call() - PM call for processor to send eemi payload
* @flag 0 - Call from secure source
INTR_PROP_DESC(PLAT_VERSAL_IPI_IRQ, GIC_HIGHEST_SEC_PRIORITY, grp, \
GIC_INTR_CFG_EDGE), \
+#define IRQ_MAX 142U
+
#endif /* PLATFORM_DEF_H */
#include "pm_defs.h"
#define UNDEFINED_CPUID (~0)
-#define IRQ_MAX 142U
-#define NUM_GICD_ISENABLER ((IRQ_MAX >> 5U) + 1U)
DEFINE_BAKERY_LOCK(pm_client_secure_lock);
*
* Return: PM node index corresponding to the specified interrupt
*/
-static enum pm_device_node_idx irq_to_pm_node_idx(uint32_t irq)
+enum pm_device_node_idx irq_to_pm_node_idx(uint32_t irq)
{
assert(irq <= IRQ_MAX);
return irq_node_map[irq];
}
-/**
- * pm_client_set_wakeup_sources - Set all devices with enabled interrupts as
- * wake sources in the LibPM.
- * @node_id: Node id of processor
- */
-static void pm_client_set_wakeup_sources(uint32_t node_id)
-{
- uint32_t reg_num;
- uint32_t device_id;
- uint8_t pm_wakeup_nodes_set[XPM_NODEIDX_DEV_MAX] = { 0U };
- uintptr_t isenabler1 = PLAT_GICD_BASE_VALUE + GICD_ISENABLER + 4;
-
- for (reg_num = 0U; reg_num < NUM_GICD_ISENABLER; reg_num++) {
- uint32_t base_irq = reg_num << ISENABLER_SHIFT;
- uint32_t reg = mmio_read_32(isenabler1 + (reg_num << 2));
-
- if (reg == 0U) {
- continue;
- }
-
- while (reg != 0U) {
- enum pm_device_node_idx node_idx;
- uint32_t idx, irq, lowest_set = reg & (-reg);
- enum pm_ret_status ret;
-
- idx = __builtin_ctz(lowest_set);
- irq = base_irq + idx;
-
- if (irq > IRQ_MAX) {
- break;
- }
-
- node_idx = irq_to_pm_node_idx(irq);
- reg &= ~lowest_set;
-
- if (node_idx > XPM_NODEIDX_DEV_MIN && node_idx < XPM_NODEIDX_DEV_MAX) {
- if (pm_wakeup_nodes_set[node_idx] == 0U) {
- /* Get device ID from node index */
- device_id = PERIPH_DEVID(node_idx);
- ret = pm_set_wakeup_source(node_id,
- device_id, 1,
- SECURE_FLAG);
- pm_wakeup_nodes_set[node_idx] = (ret == PM_RET_SUCCESS) ?
- 1 : 0;
- }
- }
- }
- }
-}
-
/**
* pm_client_suspend() - Client-specific suspend actions
*
INTR_PROP_DESC(PLAT_VERSAL_IPI_IRQ, GIC_HIGHEST_SEC_PRIORITY, grp, \
GIC_INTR_CFG_EDGE), \
+#define IRQ_MAX 200U
+
#endif /* PLATFORM_DEF_H */