arm: bcmbca: add bcm6813 SoC support

BCM6813 is a Broadcom B53 based PON and WLAN AP router SoC. It is part
of the BCA (Broadband Carrier Access origin) chipset family so it's
added under ARCH_BCMBCA platform. This initial support includes a
bare-bone implementation and dts with CPU subsystem, memory and ARM
PL011 uart.

This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux.

The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>

diff --git a/MAINTAINERS b/MAINTAINERS
index 091189bdcc7957b0ac5980f16fe9b2c14b793717..8ce2339fb9846bcb75d72ce5eae57c8361c03c91 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -224,6 +224,7 @@ N:  bcm[9]?63146
 N:     bcm[9]?63148
 N:     bcm[9]?63178
 N:     bcm[9]?6756
+N:     bcm[9]?6813
 N:     bcm[9]?6846
 N:     bcm[9]?6878
 

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f73ab1726424375dec67aa48efb678f464df91da..e2d2fffb02ce56af249f27d37b78a1511a729582 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1194,6 +1194,8 @@ dtb-$(CONFIG_BCM63178) += \
        bcm963178.dtb
 dtb-$(CONFIG_BCM6756) += \
        bcm96756.dtb
+dtb-$(CONFIG_BCM6813) += \
+       bcm96813.dtb
 dtb-$(CONFIG_BCM6846) += \
        bcm96846.dtb
 dtb-$(CONFIG_BCM6878) += \

diff --git a/arch/arm/dts/bcm6813.dtsi b/arch/arm/dts/bcm6813.dtsi
new file mode 100644 (file)
index 0000000..c3e6197
--- /dev/null
+++ b/arch/arm/dts/bcm6813.dtsi
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+       compatible = "brcm,bcm6813", "brcm,bcmbca";
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       interrupt-parent = <&gic>;
+
+       cpus {
+               #address-cells = <2>;
+               #size-cells = <0>;
+
+               B53_0: cpu@0 {
+                       compatible = "brcm,brahma-b53";
+                       device_type = "cpu";
+                       reg = <0x0 0x0>;
+                       next-level-cache = <&L2_0>;
+                       enable-method = "psci";
+               };
+
+               B53_1: cpu@1 {
+                       compatible = "brcm,brahma-b53";
+                       device_type = "cpu";
+                       reg = <0x0 0x1>;
+                       next-level-cache = <&L2_0>;
+                       enable-method = "psci";
+               };
+
+               B53_2: cpu@2 {
+                       compatible = "brcm,brahma-b53";
+                       device_type = "cpu";
+                       reg = <0x0 0x2>;
+                       next-level-cache = <&L2_0>;
+                       enable-method = "psci";
+               };
+
+               B53_3: cpu@3 {
+                       compatible = "brcm,brahma-b53";
+                       device_type = "cpu";
+                       reg = <0x0 0x3>;
+                       next-level-cache = <&L2_0>;
+                       enable-method = "psci";
+               };
+
+               L2_0: l2-cache0 {
+                       compatible = "cache";
+               };
+       };
+
+       timer {
+               compatible = "arm,armv8-timer";
+               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                       <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                       <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+                       <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+       };
+
+       pmu: pmu {
+               compatible = "arm,cortex-a53-pmu";
+               interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+                       <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+                       <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                       <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&B53_0>, <&B53_1>,
+                       <&B53_2>, <&B53_3>;
+       };
+
+       clocks: clocks {
+               periph_clk: periph-clk {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <200000000>;
+               };
+               uart_clk: uart-clk {
+                       compatible = "fixed-factor-clock";
+                       #clock-cells = <0>;
+                       clocks = <&periph_clk>;
+                       clock-div = <4>;
+                       clock-mult = <1>;
+               };
+       };
+
+       psci {
+               compatible = "arm,psci-0.2";
+               method = "smc";
+       };
+
+       axi@81000000 {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x0 0x0 0x81000000 0x8000>;
+
+               gic: interrupt-controller@1000 {
+                       compatible = "arm,gic-400";
+                       #interrupt-cells = <3>;
+                       interrupt-controller;
+                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+                       reg = <0x1000 0x1000>,
+                               <0x2000 0x2000>,
+                               <0x4000 0x2000>,
+                               <0x6000 0x2000>;
+               };
+       };
+
+       bus@ff800000 {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x0 0x0 0xff800000 0x800000>;
+
+               uart0: serial@12000 {
+                       compatible = "arm,pl011", "arm,primecell";
+                       reg = <0x12000 0x1000>;
+                       interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&uart_clk>, <&uart_clk>;
+                       clock-names = "uartclk", "apb_pclk";
+                       status = "disabled";
+               };
+       };
+};

diff --git a/arch/arm/dts/bcm96813.dts b/arch/arm/dts/bcm96813.dts
new file mode 100644 (file)
index 0000000..af17091
--- /dev/null
+++ b/arch/arm/dts/bcm96813.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6813.dtsi"
+
+/ {
+       model = "Broadcom BCM96813 Reference Board";
+       compatible = "brcm,bcm96813", "brcm,bcm6813", "brcm,bcmbca";
+
+       aliases {
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x0 0x0 0x0 0x08000000>;
+       };
+};
+
+&uart0 {
+       status = "okay";
+};

diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig
index acdb6defd8bfd547bdddde600239cb84a3c1ae84..a7a3b4b57ceb14c88ee6254a4f84a497db23388e 100644 (file)
--- a/arch/arm/mach-bcmbca/Kconfig
+++ b/arch/arm/mach-bcmbca/Kconfig
@@ -55,6 +55,13 @@ config BCM6756
        select DM_SERIAL
        select PL01X_SERIAL
 
+config BCM6813
+       bool "Support for Broadcom 6813 Family"
+       select ARM64
+       select SYS_ARCH_TIMER
+       select DM_SERIAL
+       select PL01X_SERIAL
+
 config BCM6846
        bool "Support for Broadcom 6846 Family"
        select SYS_ARCH_TIMER
@@ -76,6 +83,7 @@ source "arch/arm/mach-bcmbca/bcm63146/Kconfig"
 source "arch/arm/mach-bcmbca/bcm63148/Kconfig"
 source "arch/arm/mach-bcmbca/bcm63178/Kconfig"
 source "arch/arm/mach-bcmbca/bcm6756/Kconfig"
+source "arch/arm/mach-bcmbca/bcm6813/Kconfig"
 source "arch/arm/mach-bcmbca/bcm6846/Kconfig"
 source "arch/arm/mach-bcmbca/bcm6878/Kconfig"
 

diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile
index e9c96605b506790a09b11212c26b63e11426602f..a7bf5a616a2a415658c06c5d7fb241731661bbfb 100644 (file)
--- a/arch/arm/mach-bcmbca/Makefile
+++ b/arch/arm/mach-bcmbca/Makefile
@@ -10,5 +10,6 @@ obj-$(CONFIG_BCM63146) += bcm63146/
 obj-$(CONFIG_BCM63148) += bcm63148/
 obj-$(CONFIG_BCM63178) += bcm63178/
 obj-$(CONFIG_BCM6756) += bcm6756/
+obj-$(CONFIG_BCM6813) += bcm6813/
 obj-$(CONFIG_BCM6846) += bcm6846/
 obj-$(CONFIG_BCM6878) += bcm6878/

diff --git a/arch/arm/mach-bcmbca/bcm6813/Kconfig b/arch/arm/mach-bcmbca/bcm6813/Kconfig
new file mode 100644 (file)
index 0000000..25a4221
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm6813/Kconfig
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+
+if BCM6813
+
+config TARGET_BCM96813
+       bool "Broadcom 6813 Reference Board"
+       depends on ARCH_BCMBCA
+
+config SYS_SOC
+       default "bcm6813"
+
+source "board/broadcom/bcmbca/Kconfig"
+
+endif

diff --git a/arch/arm/mach-bcmbca/bcm6813/Makefile b/arch/arm/mach-bcmbca/bcm6813/Makefile
new file mode 100644 (file)
index 0000000..6262497
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm6813/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+obj-y += mmu_table.o

diff --git a/arch/arm/mach-bcmbca/bcm6813/mmu_table.c b/arch/arm/mach-bcmbca/bcm6813/mmu_table.c
new file mode 100644 (file)
index 0000000..eb736bf
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm6813/mmu_table.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *  Copyright 2022 Broadcom Ltd.
+ */
+#include <common.h>
+#include <asm/armv8/mmu.h>
+#include <linux/sizes.h>
+
+static struct mm_region bcm96813_mem_map[] = {
+               {
+                               .virt = 0x00000000UL,
+                               .phys = 0x00000000UL,
+                               .size = 1UL * SZ_1G,
+                               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                                               PTE_BLOCK_INNER_SHARE
+               },
+               {
+                               /* SoC peripheral */
+                               .virt = 0xff800000UL,
+                               .phys = 0xff800000UL,
+                               .size = 0x100000,
+                               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                                               PTE_BLOCK_NON_SHARE |
+                                               PTE_BLOCK_PXN | PTE_BLOCK_UXN
+               },
+               {
+                               /* List terminator */
+                               0,
+               }
+};
+
+struct mm_region *mem_map = bcm96813_mem_map;

diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig
index 7bdd96b68f84a474c07dcd7c69d29dbf34a5b662..109e7a46c6276f300f711befac8101c249cd59a9 100644 (file)
--- a/board/broadcom/bcmbca/Kconfig
+++ b/board/broadcom/bcmbca/Kconfig
@@ -58,6 +58,13 @@ config SYS_CONFIG_NAME
 
 endif
 
+if TARGET_BCM96813
+
+config SYS_CONFIG_NAME
+       default "bcm96813"
+
+endif
+
 if TARGET_BCM96846
 
 config SYS_CONFIG_NAME

diff --git a/configs/bcm96813_defconfig b/configs/bcm96813_defconfig
new file mode 100644 (file)
index 0000000..5d03624
--- /dev/null
+++ b/configs/bcm96813_defconfig
@@ -0,0 +1,23 @@
+CONFIG_ARM=y
+CONFIG_COUNTER_FREQUENCY=50000000
+CONFIG_ARCH_BCMBCA=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_BCM6813=y
+CONFIG_TARGET_BCM96813=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_DEFAULT_DEVICE_TREE="bcm96813"
+CONFIG_IDENT_STRING=" Broadcom BCM6813"
+CONFIG_SYS_LOAD_ADDR=0x01000000
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_CACHE=y
+CONFIG_OF_EMBED=y
+CONFIG_CLK=y

diff --git a/include/configs/bcm96813.h b/include/configs/bcm96813.h
new file mode 100644 (file)
index 0000000..5d9e87b
--- /dev/null
+++ b/include/configs/bcm96813.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 Broadcom Ltd.
+ */
+
+#ifndef __BCM96813_H
+#define __BCM96813_H
+
+#define CONFIG_SYS_SDRAM_BASE          0x00000000
+
+#endif