drm/i915/psr: Force manual PSR exit in older gens

To do frontbuffer tracking we are depending on Display WA #0884 to
exit PSR when there is a frontbuffer modification but according to
user reports a write to CURSURFLIVE do not cause PSR to exit in older
gens so lets force a PSR exit.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110799
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: Thomas Rohwer <trohwer85@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190617195154.30292-1-jose.souza@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 69709df4a648fe644fd92649952101138725e2ad..69d908e6a0509c04bf9f43e66341beccab75541d 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -863,16 +863,23 @@ void intel_psr_disable(struct intel_dp *intel_dp,
 
 static void psr_force_hw_tracking_exit(struct drm_i915_private *dev_priv)
 {
-       /*
-        * Display WA #0884: all
-        * This documented WA for bxt can be safely applied
-        * broadly so we can force HW tracking to exit PSR
-        * instead of disabling and re-enabling.
-        * Workaround tells us to write 0 to CUR_SURFLIVE_A,
-        * but it makes more sense write to the current active
-        * pipe.
-        */
-       I915_WRITE(CURSURFLIVE(dev_priv->psr.pipe), 0);
+       if (INTEL_GEN(dev_priv) >= 9)
+               /*
+                * Display WA #0884: skl+
+                * This documented WA for bxt can be safely applied
+                * broadly so we can force HW tracking to exit PSR
+                * instead of disabling and re-enabling.
+                * Workaround tells us to write 0 to CUR_SURFLIVE_A,
+                * but it makes more sense write to the current active
+                * pipe.
+                */
+               I915_WRITE(CURSURFLIVE(dev_priv->psr.pipe), 0);
+       else
+               /*
+                * A write to CURSURFLIVE do not cause HW tracking to exit PSR
+                * on older gens so doing the manual exit instead.
+                */
+               intel_psr_exit(dev_priv);
 }
 
 /**
@@ -903,6 +910,15 @@ void intel_psr_update(struct intel_dp *intel_dp,
                /* Force a PSR exit when enabling CRC to avoid CRC timeouts */
                if (crtc_state->crc_enabled && psr->enabled)
                        psr_force_hw_tracking_exit(dev_priv);
+               else if (INTEL_GEN(dev_priv) < 9 && psr->enabled) {
+                       /*
+                        * Activate PSR again after a force exit when enabling
+                        * CRC in older gens
+                        */
+                       if (!dev_priv->psr.active &&
+                           !dev_priv->psr.busy_frontbuffer_bits)
+                               schedule_work(&dev_priv->psr.work);
+               }
 
                goto unlock;
        }