#include "dc/inc/hw/dmcu.h"
#include "dc/inc/hw/abm.h"
#include "dc/dc_dmub_srv.h"
+#include "amdgpu_dm_trace.h"
#include "vid.h"
#include "amdgpu.h"
}
mutex_unlock(&adev->dm.dc_lock);
}
+
+void dm_write_reg_func(const struct dc_context *ctx, uint32_t address,
+ uint32_t value, const char *func_name)
+{
+#ifdef DM_CHECK_ADDR_0
+ if (address == 0) {
+ DC_ERR("invalid register write. address = 0");
+ return;
+ }
+#endif
+ cgs_write_register(ctx->cgs_device, address, value);
+ trace_amdgpu_dc_wreg(&ctx->perf_trace->write_count, address, value);
+}
+
+uint32_t dm_read_reg_func(const struct dc_context *ctx, uint32_t address,
+ const char *func_name)
+{
+ uint32_t value;
+#ifdef DM_CHECK_ADDR_0
+ if (address == 0) {
+ DC_ERR("invalid register read; address = 0\n");
+ return 0;
+ }
+#endif
+
+ if (ctx->dmub_srv &&
+ ctx->dmub_srv->reg_helper_offload.gather_in_progress &&
+ !ctx->dmub_srv->reg_helper_offload.should_burst_write) {
+ ASSERT(false);
+ return 0;
+ }
+
+ value = cgs_read_register(ctx->cgs_device, address);
+
+ trace_amdgpu_dc_rreg(&ctx->perf_trace->read_count, address, value);
+
+ return value;
+}
#include "amdgpu_dm.h"
#include "amdgpu_dm_irq.h"
#include "amdgpu_pm.h"
+#include "amdgpu_dm_trace.h"
-
-
-unsigned long long dm_get_elapse_time_in_ns(struct dc_context *ctx,
- unsigned long long current_time_stamp,
- unsigned long long last_time_stamp)
+ unsigned long long
+ dm_get_elapse_time_in_ns(struct dc_context *ctx,
+ unsigned long long current_time_stamp,
+ unsigned long long last_time_stamp)
{
return current_time_stamp - last_time_stamp;
}
-void dm_perf_trace_timestamp(const char *func_name, unsigned int line)
+void dm_perf_trace_timestamp(const char *func_name, unsigned int line, struct dc_context *ctx)
{
+ trace_amdgpu_dc_performance(ctx->perf_trace->read_count,
+ ctx->perf_trace->write_count,
+ &ctx->perf_trace->last_entry_read,
+ &ctx->perf_trace->last_entry_write,
+ func_name, line);
}
/**** power component interfaces ****/
return reg_val;
}
-uint32_t dm_read_reg_func(
- const struct dc_context *ctx,
- uint32_t address,
- const char *func_name)
-{
- uint32_t value;
-#ifdef DM_CHECK_ADDR_0
- if (address == 0) {
- DC_ERR("invalid register read; address = 0\n");
- return 0;
- }
-#endif
-
- if (ctx->dmub_srv &&
- ctx->dmub_srv->reg_helper_offload.gather_in_progress &&
- !ctx->dmub_srv->reg_helper_offload.should_burst_write) {
- ASSERT(false);
- return 0;
- }
-
- value = cgs_read_register(ctx->cgs_device, address);
- trace_amdgpu_dc_rreg(&ctx->perf_trace->read_count, address, value);
-
- return value;
-}
-
uint32_t generic_reg_get(const struct dc_context *ctx, uint32_t addr,
uint8_t shift, uint32_t mask, uint32_t *field_value)
{
#define __DM_SERVICES_H__
-#include "amdgpu_dm_trace.h"
-
/* TODO: remove when DC is complete. */
#include "dm_services_types.h"
#include "logger_interface.h"
interrupt_handler ih,
void *handler_args);
-
/*
*
* GPU registers access
*
*/
-uint32_t dm_read_reg_func(
- const struct dc_context *ctx,
- uint32_t address,
- const char *func_name);
+uint32_t dm_read_reg_func(const struct dc_context *ctx, uint32_t address,
+ const char *func_name);
+
/* enable for debugging new code, this adds 50k to the driver size. */
/* #define DM_CHECK_ADDR_0 */
-#define dm_read_reg(ctx, address) \
- dm_read_reg_func(ctx, address, __func__)
-
+void dm_write_reg_func(const struct dc_context *ctx, uint32_t address,
+ uint32_t value, const char *func_name);
+#define dm_read_reg(ctx, address) \
+ dm_read_reg_func(ctx, address, __func__)
#define dm_write_reg(ctx, address, value) \
dm_write_reg_func(ctx, address, value, __func__)
-static inline void dm_write_reg_func(
- const struct dc_context *ctx,
- uint32_t address,
- uint32_t value,
- const char *func_name)
-{
-#ifdef DM_CHECK_ADDR_0
- if (address == 0) {
- DC_ERR("invalid register write. address = 0");
- return;
- }
-#endif
- cgs_write_register(ctx->cgs_device, address, value);
- trace_amdgpu_dc_wreg(&ctx->perf_trace->write_count, address, value);
-}
-
static inline uint32_t dm_read_index_reg(
const struct dc_context *ctx,
enum cgs_ind_reg addr_space,
/*
* performance tracing
*/
-#define PERF_TRACE() trace_amdgpu_dc_performance(CTX->perf_trace->read_count,\
- CTX->perf_trace->write_count, &CTX->perf_trace->last_entry_read,\
- &CTX->perf_trace->last_entry_write, __func__, __LINE__)
-#define PERF_TRACE_CTX(__CTX) trace_amdgpu_dc_performance(__CTX->perf_trace->read_count,\
- __CTX->perf_trace->write_count, &__CTX->perf_trace->last_entry_read,\
- &__CTX->perf_trace->last_entry_write, __func__, __LINE__)
+void dm_perf_trace_timestamp(const char *func_name, unsigned int line, struct dc_context *ctx);
+#define PERF_TRACE() dm_perf_trace_timestamp(__func__, __LINE__, CTX)
+#define PERF_TRACE_CTX(__CTX) dm_perf_trace_timestamp(__func__, __LINE__, __CTX)
/*
* Debug and verification hooks