- CONFIG_SYS_FAULT_MII_ADDR:
MII address of the PHY to check for the Ethernet link state.
-- CONFIG_SPL_NS16550_MIN_FUNCTIONS:
- Define this if you desire to only have use of the NS16550_init
- and NS16550_putc functions for the serial driver located at
- drivers/serial/ns16550.c. This option is useful for saving
- space for already greatly restricted images, including but not
- limited to NAND_SPL configurations.
-
- CONFIG_DISPLAY_BOARDINFO
Display information about the board that U-Boot is running on
when U-Boot starts up. The board function checkboard() is called
/* uArchitecture specifics */
/* Serial Info */
-/* Post pad 3 bytes after each reg addr */
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_MEM32
-
#define CONFIG_SYS_NS16550_CLK 100000000
#define CONFIG_SYS_NS16550_CLK_DIV 54
#define CONFIG_SYS_NS16550_COM3 0x18023000
/* uArchitecture specifics */
/* Serial Info */
-/* no padding */
-#define CONFIG_SYS_NS16550_REG_SIZE 1
-
#define CONFIG_SYS_NS16550_CLK 0x03b9aca0
#define CONFIG_SYS_NS16550_COM1 0x18000300
CONFIG_ALTERA_TSE=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_TIMER=y
CONFIG_ALTERA_TIMER=y
CONFIG_RGMII=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_FSL=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
CONFIG_CONS_INDEX=2
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_ADDR_MAP=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
CONFIG_CONS_INDEX=2
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
CONFIG_CONS_INDEX=2
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SPL_NS16550_MIN_FUNCTIONS=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SPL_NS16550_MIN_FUNCTIONS=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SPL_NS16550_MIN_FUNCTIONS=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SPL_NS16550_MIN_FUNCTIONS=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SPL_NS16550_MIN_FUNCTIONS=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SPL_NS16550_MIN_FUNCTIONS=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SPL_NS16550_MIN_FUNCTIONS=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SPL_NS16550_MIN_FUNCTIONS=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SPL_NS16550_MIN_FUNCTIONS=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_TSEC_ENET=y
CONFIG_PCIE_FSL=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_MII=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_MII=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_MII=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_MII=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_MII=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
CONFIG_PHY_FIXED=y
CONFIG_MVGBE=y
CONFIG_MII=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
CONFIG_SYS_QE_FW_ADDR=0x200000
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SYS_QE_FW_ADDR=0x124000
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SYS_QE_FW_ADDR=0x130000
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SYS_QE_FW_ADDR=0xEFE00000
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SYS_QE_FW_ADDR=0x380000
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SYS_QE_FW_ADDR=0x124000
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SYS_QE_FW_ADDR=0x130000
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SYS_QE_FW_ADDR=0xEFF10000
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_REMOTE=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS1307=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS1307=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS1307=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS1307=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS1307=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS1307=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS1307=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS1307=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MII=y
CONFIG_DRIVER_TI_CPSW=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_TI_QSPI=y
CONFIG_USB=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MII=y
CONFIG_DRIVER_TI_CPSW=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_TI_QSPI=y
CONFIG_USB=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_E1000=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_BCMSTB=y
CONFIG_MTD=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
# CONFIG_EFI_LOADER is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_BCMSTB_SPI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_RTL8169=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_DM_RNG=y
CONFIG_RNG_ROCKCHIP=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SOUND=y
CONFIG_SOUND_DA7219=y
CONFIG_SOUND_I8254=y
CONFIG_SPL_RAM=y
CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SERIAL=y
CONFIG_SOUND=y
CONFIG_I2S=y
CONFIG_DM_RNG=y
CONFIG_RNG_ROCKCHIP=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_CROS_EC_LPC=y
CONFIG_SPL_DM_RTC=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SPI=y
CONFIG_TPM_TIS_LPC=y
CONFIG_USB_STORAGE=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_LPC=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SOUND=y
CONFIG_SPI=y
CONFIG_TPM_TIS_LPC=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SOUND=y
CONFIG_I2S=y
CONFIG_I2S_ROCKCHIP=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_LPC=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SOUND=y
CONFIG_SOUND_I8254=y
CONFIG_SOUND_RT5677=y
# CONFIG_SPL_PINCTRL is not set
# CONFIG_TPL_PINCTRL is not set
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SOUND=y
CONFIG_SOUND_I8254=y
CONFIG_SOUND_RT5677=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SERIAL=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_CROS_EC_LPC=y
CONFIG_RTL8169=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SPI=y
CONFIG_TPM_TIS_LPC=y
CONFIG_USB_STORAGE=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_WINBOND_W83627=y
CONFIG_E1000=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_WINBOND_W83627=y
CONFIG_E1000=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_LBA48=y
CONFIG_SYS_64BIT_LBA=y
# CONFIG_PCI_PNP is not set
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SOUND=y
CONFIG_SOUND_I8254=y
CONFIG_CONSOLE_SCROLL_LINES=5
CONFIG_LBA48=y
CONFIG_SYS_64BIT_LBA=y
# CONFIG_PCI_PNP is not set
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SOUND=y
CONFIG_SOUND_I8254=y
CONFIG_CONSOLE_SCROLL_LINES=5
CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_E1000=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SOUND=y
CONFIG_SOUND_I8254=y
CONFIG_SPI=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MVGBE=y
CONFIG_MII=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
CONFIG_MII=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_PHY_MARVELL=y
CONFIG_MVGBE=y
CONFIG_MII=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_MII=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
CONFIG_MII=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_LBA48=y
CONFIG_SYS_64BIT_LBA=y
# CONFIG_PCI_PNP is not set
+CONFIG_SYS_NS16550_PORT_MAPPED=y
# CONFIG_GZIP is not set
CONFIG_EFI=y
CONFIG_EFI_STUB=y
CONFIG_LBA48=y
CONFIG_SYS_64BIT_LBA=y
# CONFIG_PCI_PNP is not set
+CONFIG_SYS_NS16550_PORT_MAPPED=y
# CONFIG_GZIP is not set
CONFIG_EFI=y
CONFIG_EFI_STUB=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_SPECIFY_CONSOLE_INDEX is not set
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SOUND=y
CONFIG_SYSRESET=y
CONFIG_DM_THERMAL=y
CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_PANIC_HANG=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_PINCTRL=y
# CONFIG_SPL_DM_SERIAL is not set
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
# CONFIG_SPL_SYSRESET is not set
CONFIG_USB=y
CONFIG_RAM=y
CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_TPL_RAM=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
# CONFIG_TPL_SYSRESET is not set
CONFIG_USB=y
CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_DM_RESET=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_ERRNO_STR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_SPECIFY_CONSOLE_INDEX is not set
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SOUND=y
CONFIG_SYSRESET=y
CONFIG_DM_THERMAL=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_ERRNO_STR=y
CONFIG_MII=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_MII=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MVGBE=y
CONFIG_MII=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_MII=y
CONFIG_PCI=y
CONFIG_PCI_MVEBU=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MVGBE=y
CONFIG_MII=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
CONFIG_KEYSTONE_USB_PHY=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_DAVINCI_SPI=y
CONFIG_KEYSTONE_USB_PHY=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_DAVINCI_SPI=y
CONFIG_REMOTEPROC_TI_POWER=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_REMOTEPROC_TI_POWER=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_KEYSTONE_USB_PHY=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_DAVINCI_SPI=y
CONFIG_KEYSTONE_USB_PHY=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_DAVINCI_SPI=y
CONFIG_KEYSTONE_USB_PHY=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_DAVINCI_SPI=y
CONFIG_KEYSTONE_USB_PHY=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_DAVINCI_SPI=y
CONFIG_RAM_RK3399_LPDDR4=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_RAM_RK3399_LPDDR4=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_RAM_RK3399_LPDDR4=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_DM_REGULATOR_FIXED=y
# CONFIG_SPL_DM_SERIAL is not set
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
# CONFIG_SPL_SYSRESET is not set
CONFIG_USB=y
CONFIG_RAM_RK3399_LPDDR4=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSINFO=y
CONFIG_SYSINFO_SMBIOS=y
CONFIG_FSL_PFE=y
CONFIG_DM_RTC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_FSL_PFE=y
CONFIG_DM_RTC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_RTC_PCF8563=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_RTC_PCF8563=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_RTC_PCF8563=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_U_QE=y
CONFIG_SYS_QE_FW_ADDR=0xf40000
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SCSI_AHCI_PLAT=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SCSI_AHCI_PLAT=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_U_QE=y
CONFIG_SYS_QE_FW_ADDR=0x940000
CONFIG_SCSI_AHCI_PLAT=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_RTC_PCF2127=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_RTC_PCF2127=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_RTC_PCF2127=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_RTC_PCF2127=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x940000
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x940000
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x940000
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x940000
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_POWER_I2C=y
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_POWER_I2C=y
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_POWER_I2C=y
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_POWER_I2C=y
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_POWER_I2C=y
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_SCSI_AHCI_PLAT=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_POWER_I2C=y
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_POWER_LEGACY=y
CONFIG_POWER_I2C=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_POWER_LEGACY=y
CONFIG_POWER_I2C=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SCSI_AHCI_PLAT=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
CONFIG_CONS_INDEX=2
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
CONFIG_CONS_INDEX=2
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
CONFIG_CONS_INDEX=2
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
CONFIG_CONS_INDEX=2
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_RTC=y
CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
CONFIG_CONS_INDEX=2
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_SCSI=y
CONFIG_CONS_INDEX=2
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_RTC=y
CONFIG_DM_SCSI=y
CONFIG_CONS_INDEX=2
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_DM_RTC=y
CONFIG_DM_SCSI=y
CONFIG_CONS_INDEX=2
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_PCI_MSC01=y
CONFIG_RTC_MC146818=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_PCI_MSC01=y
CONFIG_RTC_MC146818=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_PCI_MSC01=y
CONFIG_RTC_MC146818=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_PCI_MSC01=y
CONFIG_RTC_MC146818=y
CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_RTL8169=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_DM_RESET=y
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SERIAL=y
CONFIG_SYSRESET=y
CONFIG_TIMER=y
CONFIG_DM_RESET=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_DM_RESET=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSINFO=y
CONFIG_SYSRESET=y
# CONFIG_TPL_SYSRESET is not set
CONFIG_RAM_RK3399_LPDDR4=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_MII=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MVGBE=y
CONFIG_MII=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MVGBE=y
CONFIG_MII=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MVGBE=y
CONFIG_MII=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MVGBE=y
CONFIG_MII=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MVGBE=y
CONFIG_MII=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
CONFIG_PHY_MARVELL=y
CONFIG_MVGBE=y
CONFIG_MII=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_UBIFS_SILENCE_MSG=y
# CONFIG_SPECIFY_CONSOLE_INDEX is not set
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SOUND=y
CONFIG_SYSRESET=y
CONFIG_DM_THERMAL=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MMC_OMAP_HS=y
CONFIG_CONS_INDEX=3
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OMAP3=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MMC_OMAP_HS=y
CONFIG_CONS_INDEX=3
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_OMAP3=y
CONFIG_USB_GADGET=y
CONFIG_SCSI=y
CONFIG_SCSI_AHCI_PLAT=y
CONFIG_CONS_INDEX=3
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_DWC3=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MVGBE=y
CONFIG_MII=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MVGBE=y
CONFIG_MII=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MVGBE=y
CONFIG_MII=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_PHY_MARVELL=y
CONFIG_MVGBE=y
CONFIG_MII=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_PCI_MVEBU=y
CONFIG_DM_RTC=y
CONFIG_RTC_EMULATION=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PCI=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_DM_RTC=y
CONFIG_RTC_ISL1208=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
# CONFIG_SPECIFY_CONSOLE_INDEX is not set
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SOUND=y
CONFIG_SYSRESET=y
CONFIG_DM_THERMAL=y
# CONFIG_SPECIFY_CONSOLE_INDEX is not set
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SOUND=y
CONFIG_SYSRESET=y
CONFIG_DM_THERMAL=y
# CONFIG_SPECIFY_CONSOLE_INDEX is not set
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SOUND=y
CONFIG_SYSRESET=y
CONFIG_DM_THERMAL=y
CONFIG_CPU=y
CONFIG_NVME_PCI=y
CONFIG_SPL_DM_RTC=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SPI=y
CONFIG_USB_KEYBOARD=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_NVME_PCI=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SPI=y
CONFIG_USB_KEYBOARD=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_DM_RESET=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSINFO=y
CONFIG_SYSINFO_SMBIOS=y
CONFIG_SYSRESET=y
CONFIG_DM_RESET=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_DM_RESET=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_DM_RESET=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_DM_RESET=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSINFO=y
CONFIG_SYSINFO_SMBIOS=y
CONFIG_SYSRESET=y
CONFIG_DM_RESET=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_SPL_RAM=y
# CONFIG_RAM_ROCKCHIP_DEBUG is not set
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_DM_RESET=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSINFO=y
CONFIG_SYSINFO_SMBIOS=y
CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SERIAL=y
CONFIG_SYSRESET=y
CONFIG_TIMER=y
CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_ERRNO_STR=y
CONFIG_MII=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LBA48=y
CONFIG_SYS_64BIT_LBA=y
# CONFIG_PCI_PNP is not set
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_CONSOLE_SCROLL_LINES=5
# CONFIG_GZIP is not set
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
CONFIG_DM_RESET=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
CONFIG_DM_RESET=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
CONFIG_DM_RESET=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
CONFIG_SPL_FS_LOADER=y
CONFIG_MMC_DW=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
CONFIG_DESIGNWARE_APB_TIMER=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
CONFIG_DM_RESET=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
CONFIG_DM_RESET=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
CONFIG_DM_RESET=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
CONFIG_DM_RESET=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
CONFIG_DM_RESET=y
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_E1000=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_DM_RTC=y
CONFIG_RTC_RX8025=y
CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_WINBOND_W83627=y
CONFIG_E1000=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_WINBOND_W83627=y
CONFIG_E1000=y
+CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0xc0000
CONFIG_MII=y
CONFIG_DRIVER_TI_EMAC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
# CONFIG_USE_PRIVATE_LIBGCC is not set
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_SYS_MAX_FLASH_SECT=1027
CONFIG_PHYLIB=y
CONFIG_ETHOC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SYS_NS16550_REG_SIZE=-4
CONFIG_SYSRESET=y
CONFIG_OF_LIBFDT=y
help
Support for the UART found on Microchip PIC32 SoC's.
+config SYS_NS16550_SERIAL
+ bool "NS16550 UART or compatible legacy driver"
+ depends on !DM_SERIAL
+ select SYS_NS16550
+
+config SPL_SYS_NS16550_SERIAL
+ bool "NS16550 UART or compatible legacy driver in SPL"
+ depends on SPL && !SPL_DM_SERIAL
+ default y if SYS_NS16550_SERIAL || ARCH_SUNXI || ARCH_OMAP2PLUS
+ select SYS_NS16550
+
config SYS_NS16550
bool "NS16550 UART or compatible"
help
config NS16550_DYNAMIC
bool "Allow NS16550 to be configured at runtime"
+ depends on SYS_NS16550
default y if SYS_COREBOOT || SYS_SLIMBOOTLOADER
help
Enable this option to allow device-tree control of the driver.
Normally this driver is controlled by the following options:
- CONFIG_SYS_NS16550_PORT_MAPPED - indicates that port I/O is used for
- access. If not enabled, then the UART is memory-mapped.
- CONFIG_SYS_NS16550_MEM32 - if memory-mapped, indicates that 32-bit
- access should be used (instead of 8-bit)
- CONFIG_SYS_NS16550_REG_SIZE - indicates register width and also
- endianness. If positive, big-endian access is used. If negative,
- little-endian is used.
-
It is not a good practice for a driver to be statically configured,
since it prevents the same driver being used for different types of
UARTs in a system. This option avoids this problem at the cost of a
slightly increased code size.
+config SYS_NS16550_MEM32
+ bool "If memory-mapped, 32bit access is needed for ns16550 register access"
+ depends on SYS_NS16550
+ help
+ If enabled, if memory-mapped, indicates that 32-bit access should be
+ used (instead of 8-bit) for register access.
+
+config SYS_NS16550_PORT_MAPPED
+ bool "Port I/O is used for ns16550 register access"
+ depends on SYS_NS16550
+ help
+ If enabled, port I/O is used for ns16550 register access. If not
+ enabled, then the UART is memory-mapped.
+
+config SYS_NS16550_REG_SIZE
+ int "ns16550 register width and endianness"
+ depends on SYS_NS16550_SERIAL || SPL_SYS_NS16550_SERIAL
+ range -4 4
+ default -4 if ARCH_OMAP2PLUS || ARCH_SUNXI
+ default 1
+ help
+ Indicates register width and also endianness. If positive, big-endian
+ access is used. If negative, little-endian is used.
+
+config SPL_NS16550_MIN_FUNCTIONS
+ bool "Only provide NS16550_init and NS16550_putc in SPL"
+ depends on SPL_SYS_NS16550_SERIAL && PPC
+ help
+ Enable this if you desire to only have use of the NS16550_init and
+ NS16550_putc functions for the serial driver located at
+ drivers/serial/ns16550.c. This option is useful for saving space for
+ already greatly restricted images, including but not limited to
+ NAND_SPL configurations.
+
config INTEL_MID_SERIAL
bool "Intel MID platform UART support"
depends on DM_SERIAL && OF_CONTROL
obj-$(CONFIG_PL01X_SERIAL) += serial_pl01x.o
else
obj-$(CONFIG_PL011_SERIAL) += serial_pl01x.o
-obj-$(CONFIG_SYS_NS16550_SERIAL) += serial_ns16550.o
+obj-$(CONFIG_$(SPL_)SYS_NS16550_SERIAL) += serial_ns16550.o
endif
obj-$(CONFIG_ALTERA_UART) += altera_uart.o
/*
* SERIAL
*/
-#define CONFIG_SYS_NS16550_MEM32
/*
* Flash
/*
* Serial Port
*/
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_BAUDRATE_TABLE \
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/* Serial Port */
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_BAUDRATE_TABLE \
/* Serial Port */
#undef CONFIG_SERIAL_SOFTWARE_FIFO
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
-#define CONFIG_SPL_NS16550_MIN_FUNCTIONS
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
* open - index 2
* shorted - index 1
*/
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_BAUDRATE_TABLE \
/*
* NS16550 Configuration
*/
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
/*
* NS16550 Configuration
*/
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/* Serial Port */
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_BAUDRATE_TABLE \
* open - index 2
* shorted - index 1
*/
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_BAUDRATE_TABLE \
/*
* Serial Port
*/
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
/*
* Serial Port
*/
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
* open - index 2
* shorted - index 1
*/
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
#define CONFIG_SYS_BAUDRATE_TABLE \
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_CLK 48000000
-#if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL)
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_SERIAL
-#endif
/* I2C Configuration */
/*
* Serial console configuration
*/
-#define CONFIG_SYS_NS16550_SERIAL
-#ifndef CONFIG_DM_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE -4
-#endif
#define CONFIG_SYS_NS16550_CLK 19660800
/* Init Stack Pointer */
/*
* UART configuration
*/
-#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK 33333333
-#define CONFIG_SYS_NS16550_MEM32
/*
* Ethernet PHY configuration
*/
#define V_NS16550_CLK 81000000
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
/*
/* legacy #defines for non DM bur-board */
#ifndef CONFIG_DM
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK (48000000)
#define CONFIG_SYS_NS16550_COM1 0x44e09000
"stdout=vidconsole,serial\0" \
"stderr=vidconsole,serial\0"
-#define CONFIG_SYS_NS16550_MEM32
-#undef CONFIG_SYS_NS16550_PORT_MAPPED
-
#endif /* __CONFIG_H */
#include <asm/arch/omap.h>
/* Serial support */
-#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK 48000000
#define CONFIG_SYS_NS16550_COM1 0x44e09000
-#if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL)
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#endif
/* NAND support */
#define CFG_SYS_NAND_ECCSIZE 512
#ifndef CONFIG_INTERNAL_UART
/* Use BayTrail internal HS UART which is memory-mapped */
-#undef CONFIG_SYS_NS16550_PORT_MAPPED
#endif
#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \
#include <configs/x86-common.h>
/* ns16550 UART is memory-mapped in Quark SoC */
-#undef CONFIG_SYS_NS16550_PORT_MAPPED
#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \
"stdout=serial\0" \
/* Serial SPL */
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
-#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_NS16550_CLK 40000000
-#define CONFIG_SYS_NS16550_REG_SIZE -4
#define CONFIG_SYS_NS16550_COM1 0xb0000c00
#endif
/*
* UART configuration
*/
-#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK 33330000
-#define CONFIG_SYS_NS16550_MEM32
/*
* Ethernet PHY configuration
/*
* UART configuration
*/
-#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK 33330000
-#define CONFIG_SYS_NS16550_MEM32
/*
* Ethernet PHY configuration
/*
* Serial Port
*/
-#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
/*
* Retain non-DM serial port for debug purposes.
*/
#if !defined(CONFIG_DM_SERIAL)
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x11C500)
#endif
/*
* Serial Driver info
*/
-#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID)
/* Serial SPL */
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
-#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_NS16550_CLK 40000000
-#define CONFIG_SYS_NS16550_REG_SIZE -4
#define CONFIG_SYS_NS16550_COM3 0xb0000e00
#endif
/* GPIO */
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
#define CONFIG_HWCONFIG
/*
* Serial Port
*/
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
/*
* Serial Port
*/
#ifndef CONFIG_LPUART
-#define CONFIG_SYS_NS16550_SERIAL
-#ifndef CONFIG_DM_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
-#endif
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#endif
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
/* Serial Port */
-#define CONFIG_SYS_NS16550_SERIAL
-#ifndef CONFIG_DM_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
-#endif
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
/* I2C */
* Serial Port
*/
#ifndef CONFIG_LPUART
-#define CONFIG_SYS_NS16550_SERIAL
-#ifndef CONFIG_DM_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
-#endif
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#endif
/* I2C */
/* Serial Port */
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
/* Miscellaneous configurable options */
#define CPU_RELEASE_ADDR secondary_boot_addr
/* Serial Port */
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
/* SD boot SPL */
#define CPU_RELEASE_ADDR secondary_boot_addr
/* Serial Port */
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
/* SD boot SPL */
/* Serial Port */
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
/*
/* I2C */
/* Serial Port */
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
/*
/*
* Serial driver
*/
-#define CONFIG_SYS_NS16550_PORT_MAPPED
/*
* Flash configuration
/* Serial SPL */
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
-#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_NS16550_CLK 50000000
-#define CONFIG_SYS_NS16550_REG_SIZE -4
#define CONFIG_SYS_NS16550_COM1 0xbe000c00
#endif
/* Serial SPL */
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
-#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_NS16550_CLK 40000000
-#define CONFIG_SYS_NS16550_REG_SIZE -4
#define CONFIG_SYS_NS16550_COM1 0xb0000c00
#endif
#include <linux/sizes.h>
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE -4
-#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_NS16550_COM1 0x11005200
#define CONFIG_SYS_NS16550_CLK 26000000
#include <linux/sizes.h>
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE -4
-#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_NS16550_COM1 0x11005000
#define CONFIG_SYS_NS16550_CLK 26000000
/*
* NS16550 Configuration
*/
-#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
#if !defined(CONFIG_DM_SERIAL)
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE
#endif
*/
#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
-#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
/*
* shorted - index 1
*/
#undef CONFIG_SERIAL_SOFTWARE_FIFO
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
-#define CONFIG_SPL_NS16550_MIN_FUNCTIONS
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
#include "rockchip-common.h"
-#define CONFIG_SYS_NS16550_MEM32
-
/* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */
#define CONFIG_IRAM_BASE 0xff020000
#include "rockchip-common.h"
-#define CONFIG_SYS_NS16550_MEM32
-
#define CONFIG_IRAM_BASE 0xfff80000
#define CONFIG_SYS_SDRAM_BASE 0
#define _ROCKCHIP_COMMON_H_
#include <linux/sizes.h>
-#define CONFIG_SYS_NS16550_MEM32
-
/* ((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512) */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
/* NS16550 Configuration */
-#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK (48000000)
#define CONFIG_SYS_NS16550_COM1 0x44e09000
#define CONFIG_SYS_NS16550_COM4 0x481a6000
* Serial
*/
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#endif
-
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
/*
* Serial / UART configurations
*/
-#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
/*
/*
* Serial / UART configurations
*/
-#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
#define CONFIG_EXTRA_ENV_SETTINGS \
* Serial / UART configurations
*/
#define CONFIG_SYS_NS16550_CLK 100000000
-#define CONFIG_SYS_NS16550_MEM32
/*
* SDMMC configurations
#include <linux/stringify.h>
/* Serial & console */
-#define CONFIG_SYS_NS16550_SERIAL
/* ns16550 reg in the low bits of cpu reg */
#ifdef CONFIG_MACH_SUNIV
/* suniv doesn't have apb2 and uart is connected to apb1 */
#define CONFIG_SYS_NS16550_CLK 24000000
#endif
#ifndef CONFIG_DM_SERIAL
-# define CONFIG_SYS_NS16550_REG_SIZE -4
# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
/*
* UART configuration
*/
-#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK 166666666
/*
#include <configs/x86-common.h>
/* Use BayTrail internal HS UART which is memory-mapped */
-#undef CONFIG_SYS_NS16550_PORT_MAPPED
/* Set the board specific parameters */
#define DEF_ENV_TFTPDIR "theadorable-x86-dfi"
#define CONFIG_SYS_TIMERBASE 0x4802E000
/* NS16550 Configuration */
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK (48000000)
#define CONFIG_SYS_NS16550_COM1 0x48020000 /* Base EVM has UART0 */
/*
* NS16550 Configuration
*/
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK (48000000)
#define CONFIG_SYS_NS16550_COM1 0x48024000 /* Base EVM has UART2 */
#include <asm/arch/omap.h>
/* NS16550 Configuration */
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_NS16550_SERIAL
-#ifndef CONFIG_DM_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#endif
-#endif
#define CONFIG_SYS_NS16550_CLK 48000000
/*
#define KEYSTONE_SRAM_SCRATCH_SPACE_END (TI_SRAM_SCRATCH_BOARD_EEPROM_END)
/* UART Configuration */
-#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
#define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
/* NS16550 Configuration */
#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
-#if !defined(CONFIG_DM_SERIAL)
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#endif /* !CONFIG_DM_SERIAL */
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
115200}
*/
#define CONFIG_SYS_NS16550_CLK 48000000
#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_COM3 UART3_BASE
#endif
* Hardware drivers
*/
#define CONFIG_SYS_NS16550_CLK 48000000
-#if !defined(CONFIG_DM_SERIAL)
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#endif
/*
* Environment setup
#define CONFIG_SYS_UBOOT_BASE 0
/* Serial SPL */
-#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_NS16550_CLK 40000000
-#define CONFIG_SYS_NS16550_REG_SIZE -4
#define CONFIG_SYS_NS16550_COM3 0xb0000e00
/* RAM */
/*
* NS16550 Configuration
*/
-#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
#if !defined(CONFIG_DM_SERIAL)
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE
#endif
/*-----------------------------------------------------------------------
* Serial Configuration
*/
-#define CONFIG_SYS_NS16550_PORT_MAPPED
/*
* Miscellaneous configurable options
/* Serial Driver Info */
/*====================*/
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_COM1 IOADDR(0x0D050020) /* Base address */
/* Input clk to NS16550 (in Hz; the SYS_CLK_FREQ is in kHz) */
#include <linux/types.h>
-#ifdef CONFIG_DM_SERIAL
+#if defined(CONFIG_DM_SERIAL) && !defined(CONFIG_SYS_NS16550_REG_SIZE)
/*
* For driver model we always use one byte per register, and sort out the
* differences in the driver