PCI: dwc: Fix MSI msi_msg DMA mapping

As of 07940c369a6b ("PCI: dwc: Fix MSI page leakage in suspend/resume"),
the PCIe designware host driver has been using the driver data allocation
for the msi_msg DMA mapping which can result in a DMA_MAPPING_ERROR due to
the DMA overflow check in dma_direct_map_page() when the address is greater
than 32 bits (reported in [1]). The commit was trying to address a memory
leak on suspend/resume by moving the MSI mapping to dw_pcie_host_init(),
but subsequently dropped the page allocation thinking it wasn't needed.

To fix the DMA mapping issue as well as make msi_msg DMA'able, switch back
to allocating a 32-bit page for the msi_msg. To avoid the suspend/resume
leak, allocate the page in dw_pcie_host_init() since that shouldn't be
called during suspend/resume.

[1] https://lore.kernel.org/all/Yo0soniFborDl7+C@google.com/

Signed-off-by: Will McVicker <willmcvicker@google.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rob Herring <robh@kernel.org>

diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 6993ce9e856db386185d4b42e0ff7002f5733872..ff3451a6b8466172c200cc8067c6066300d1ff04 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -267,8 +267,9 @@ static void dw_pcie_free_msi(struct dw_pcie_rp *pp)
                struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
                struct device *dev = pci->dev;
 
-               dma_unmap_single_attrs(dev, pp->msi_data, sizeof(pp->msi_msg),
-                                      DMA_FROM_DEVICE, DMA_ATTR_SKIP_CPU_SYNC);
+               dma_unmap_page(dev, pp->msi_data, PAGE_SIZE, DMA_FROM_DEVICE);
+               if (pp->msi_page)
+                       __free_page(pp->msi_page);
        }
 }
 
@@ -395,13 +396,14 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
                        if (ret)
                                dev_warn(dev, "Failed to set DMA mask to 32-bit. Devices with only 32-bit MSI support may not work properly\n");
 
-                       pp->msi_data = dma_map_single_attrs(dev, &pp->msi_msg,
-                                                     sizeof(pp->msi_msg),
-                                                     DMA_FROM_DEVICE,
-                                                     DMA_ATTR_SKIP_CPU_SYNC);
+                       pp->msi_page = alloc_page(GFP_DMA32);
+                       pp->msi_data = dma_map_page(dev, pp->msi_page, 0,
+                                                   PAGE_SIZE, DMA_FROM_DEVICE);
                        ret = dma_mapping_error(dev, pp->msi_data);
                        if (ret) {
                                dev_err(pci->dev, "Failed to map MSI data\n");
+                               __free_page(pp->msi_page);
+                               pp->msi_page = NULL;
                                pp->msi_data = 0;
                                goto err_free_msi;
                        }

diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index c3e73ed9aff55e19906a7cfefa0f2fcad71fb71c..7c63204d23ba7a6b0a42b8ee7be7b7497dbade79 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -203,8 +203,8 @@ struct dw_pcie_rp {
        int                     msi_irq;
        struct irq_domain       *irq_domain;
        struct irq_domain       *msi_domain;
-       u16                     msi_msg;
        dma_addr_t              msi_data;
+       struct page             *msi_page;
        struct irq_chip         *msi_irq_chip;
        u32                     num_vectors;
        u32                     irq_mask[MAX_MSI_CTRLS];