drm/i915: Add Wa_1605460711 / Wa_1408767742 to ICL and EHL

This workaround appears under two different numbers (and with somewhat
confused stepping applicability on ICL).  Ultimately it appears we
should just implement this for all stepping of ICL and EHL.

Note that this is identical to Wa_1407928979:tgl that already exists in
our driver too...yet another number referencing the same actual
workaround.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200311162300.1838847-7-matthew.d.roper@intel.com
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index cbfc8d5ebb3eb531f4ad3609290b40efbdc39b6d..5176ad1a3976ba393471d343b3c11df00094d001 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1487,6 +1487,14 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
                wa_write_or(wal,
                            SUBSLICE_UNIT_LEVEL_CLKGATE,
                            GWUNIT_CLKGATE_DIS);
+
+               /*
+                * Wa_1408767742:icl[a2..forever],ehl[all]
+                * Wa_1605460711:icl[a0..c0]
+                */
+               wa_write_or(wal,
+                           GEN7_FF_THREAD_MODE,
+                           GEN12_FF_TESSELATION_DOP_GATE_DISABLE);
        }
 
        if (IS_GEN_RANGE(i915, 9, 12)) {