ARM: dts: socfpga: add i2c reset signals

Add the reset signals for the i2c controllers on Cyclone5-based
SoCFPGA boards to the dtsi.

Signed-off-by: Tim Sander <tim.sander@hbm.com>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 7e24dc8e82d4f0834274f6f01deec5700e4e0ebb..c42ca7022e8c24318c0c7f02877d9bb6bbb62d3e 100644 (file)
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -651,6 +651,7 @@
                        #size-cells = <0>;
                        compatible = "snps,designware-i2c";
                        reg = <0xffc04000 0x1000>;
+                       resets = <&rst I2C0_RESET>;
                        clocks = <&l4_sp_clk>;
                        interrupts = <0 158 0x4>;
                        status = "disabled";
@@ -661,6 +662,7 @@
                        #size-cells = <0>;
                        compatible = "snps,designware-i2c";
                        reg = <0xffc05000 0x1000>;
+                       resets = <&rst I2C1_RESET>;
                        clocks = <&l4_sp_clk>;
                        interrupts = <0 159 0x4>;
                        status = "disabled";
@@ -671,6 +673,7 @@
                        #size-cells = <0>;
                        compatible = "snps,designware-i2c";
                        reg = <0xffc06000 0x1000>;
+                       resets = <&rst I2C2_RESET>;
                        clocks = <&l4_sp_clk>;
                        interrupts = <0 160 0x4>;
                        status = "disabled";
@@ -681,6 +684,7 @@
                        #size-cells = <0>;
                        compatible = "snps,designware-i2c";
                        reg = <0xffc07000 0x1000>;
+                       resets = <&rst I2C3_RESET>;
                        clocks = <&l4_sp_clk>;
                        interrupts = <0 161 0x4>;
                        status = "disabled";