clk: renesas: r8a77995: Correct parent clock of INTC-AP

According to the R-Car Gen3 Hardware Manual Errata for Rev 0.55 of
September 8, 2017, the parent clock of the INTC-AP module clock on R-Car
D3 is S1D2.

This change has no functional impact.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c
index e594cf8ee63b64e0b297c623ca31551b06d9fe31..ea4cafbe6e851aca89c24f79b4912b1a2278d774 100644 (file)
--- a/drivers/clk/renesas/r8a77995-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c
@@ -127,7 +127,7 @@ static const struct mssr_mod_clk r8a77995_mod_clks[] __initconst = {
        DEF_MOD("usb-dmac1",             331,   R8A77995_CLK_S3D1),
        DEF_MOD("rwdt",                  402,   R8A77995_CLK_R),
        DEF_MOD("intc-ex",               407,   R8A77995_CLK_CP),
-       DEF_MOD("intc-ap",               408,   R8A77995_CLK_S3D1),
+       DEF_MOD("intc-ap",               408,   R8A77995_CLK_S1D2),
        DEF_MOD("audmac0",               502,   R8A77995_CLK_S3D1),
        DEF_MOD("hscif3",                517,   R8A77995_CLK_S3D1C),
        DEF_MOD("hscif0",                520,   R8A77995_CLK_S3D1C),