amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \
amdgpu_gmc.o amdgpu_mmhub.o amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o amdgpu_vm_cpu.o \
amdgpu_vm_sdma.o amdgpu_discovery.o amdgpu_ras_eeprom.o amdgpu_nbio.o \
- amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_tmz.o
+ amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
#include "amdgpu_umc.h"
#include "amdgpu_mmhub.h"
#include "amdgpu_df.h"
-#include "amdgpu_tmz.h"
#define MAX_GPU_INSTANCE 16
/* df */
struct amdgpu_df df;
- /* tmz */
- struct amdgpu_tmz tmz;
-
struct amdgpu_ip_block ip_blocks[AMDGPU_MAX_IP_NUM];
int num_ip_blocks;
struct mutex mn_lock;
\
static struct device_attribute pmu_attr_##_name = __ATTR_RO(_name)
-#endif
+static inline bool amdgpu_is_tmz(struct amdgpu_device *adev)
+{
+ return adev->gmc.tmz_enabled;
+}
+#endif
#include "amdgpu_ras.h"
#include "amdgpu_pmu.h"
#include "amdgpu_fru_eeprom.h"
-#include "amdgpu_tmz.h"
#include <linux/suspend.h>
#include <drm/task_barrier.h>
adev->firmware.load_type = amdgpu_ucode_get_load_type(adev, amdgpu_fw_load_type);
- adev->tmz.enabled = amdgpu_is_tmz(adev);
+ amdgpu_gmc_tmz_set(adev);
return 0;
}
if (args->in.domains & ~AMDGPU_GEM_DOMAIN_MASK)
return -EINVAL;
- if (!adev->tmz.enabled && (flags & AMDGPU_GEM_CREATE_ENCRYPTED)) {
- DRM_ERROR("Cannot allocate secure buffer while tmz is disabled\n");
+ if (amdgpu_is_tmz(adev) && (flags & AMDGPU_GEM_CREATE_ENCRYPTED)) {
+ DRM_ERROR("Cannot allocate secure buffer since TMZ is disabled\n");
return -EINVAL;
}
return 0;
}
+
+/**
+ * amdgpu_tmz_set -- check and set if a device supports TMZ
+ * @adev: amdgpu_device pointer
+ *
+ * Check and set if an the device @adev supports Trusted Memory
+ * Zones (TMZ).
+ */
+void amdgpu_gmc_tmz_set(struct amdgpu_device *adev)
+{
+ if (!amdgpu_tmz)
+ return;
+
+ if (adev->asic_type < CHIP_RAVEN ||
+ adev->asic_type == CHIP_ARCTURUS) {
+ adev->gmc.tmz_enabled = false;
+ dev_warn(adev->dev,
+ "Trusted Memory Zone (TMZ) feature not supported\n");
+ } else {
+
+ adev->gmc.tmz_enabled = true;
+ dev_info(adev->dev,
+ "Trusted Memory Zone (TMZ) feature supported and enabled\n");
+ }
+}
} fault_hash[AMDGPU_GMC_FAULT_HASH_SIZE];
uint64_t last_fault:AMDGPU_GMC_FAULT_RING_ORDER;
+ bool tmz_enabled;
+
const struct amdgpu_gmc_funcs *gmc_funcs;
struct amdgpu_xgmi xgmi;
void amdgpu_gmc_ras_fini(struct amdgpu_device *adev);
int amdgpu_gmc_allocate_vm_inv_eng(struct amdgpu_device *adev);
+extern void amdgpu_gmc_tmz_set(struct amdgpu_device *adev);
+
#endif
+++ /dev/null
-/*
- * Copyright 2019 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <linux/device.h>
-
-#include <drm/amd_asic_type.h>
-
-#include "amdgpu.h"
-#include "amdgpu_tmz.h"
-
-
-/**
- * amdgpu_is_tmz - validate trust memory zone
- *
- * @adev: amdgpu_device pointer
- *
- * Return true if @dev supports trusted memory zones (TMZ), and return false if
- * @dev does not support TMZ.
- */
-bool amdgpu_is_tmz(struct amdgpu_device *adev)
-{
- if (!amdgpu_tmz)
- return false;
-
- if (adev->asic_type < CHIP_RAVEN || adev->asic_type == CHIP_ARCTURUS) {
- dev_warn(adev->dev, "doesn't support trusted memory zones (TMZ)\n");
- return false;
- }
-
- dev_info(adev->dev, "TMZ feature is enabled\n");
-
- return true;
-}
+++ /dev/null
-/*
- * Copyright 2019 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef __AMDGPU_TMZ_H__
-#define __AMDGPU_TMZ_H__
-
-#include "amdgpu.h"
-
-/*
- * Trust memory zone stuff
- */
-struct amdgpu_tmz {
- bool enabled;
-};
-
-
-extern bool amdgpu_is_tmz(struct amdgpu_device *adev);
-
-#endif
* cmd = 1: frame end
*/
amdgpu_ring_write(ring,
- ((ring->adev->tmz.enabled && trusted) ? FRAME_TMZ : 0)
+ ((amdgpu_is_tmz(ring->adev) && trusted) ? FRAME_TMZ : 0)
| FRAME_CMD(start ? 0 : 1));
}
* cmd = 1: frame end
*/
amdgpu_ring_write(ring,
- ((ring->adev->tmz.enabled && trusted) ? FRAME_TMZ : 0)
+ ((amdgpu_is_tmz(ring->adev) && trusted) ? FRAME_TMZ : 0)
| FRAME_CMD(start ? 0 : 1));
}