imply CMD_DM
imply FAT_WRITE
-config ARCH_BCM6753
- bool "Broadcom BCM6753 family"
- select CPU_V7A
- select DM
- select OF_CONTROL
- imply CMD_DM
-
config ARCH_BCMSTB
bool "Broadcom BCM7XXX family"
select CPU_V7A
source "board/armltd/vexpress/Kconfig"
source "board/armltd/vexpress64/Kconfig"
source "board/cortina/presidio-asic/Kconfig"
-source "board/broadcom/bcm96753ref/Kconfig"
source "board/broadcom/bcmns3/Kconfig"
source "board/cavium/thunderx/Kconfig"
source "board/eets/pdu001/Kconfig"
bcm2837-rpi-cm3-io3.dtb \
bcm2711-rpi-4-b.dtb
-dtb-$(CONFIG_ARCH_BCM6753) += \
- bcm96753ref.dtb
-
dtb-$(CONFIG_TARGET_BCMNS3) += ns3-board.dtb
dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb
dtb-$(CONFIG_BCM6846) += \
bcm96846.dtb
dtb-$(CONFIG_BCM6855) += \
- bcm96855.dtb
+ bcm96855.dtb \
+ bcm96753ref.dtb
dtb-$(CONFIG_BCM6856) += \
bcm96856.dtb \
bcm968360bg.dtb
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2022 Philippe Reynes <philippe.reynes@softathome.com>
- */
-
-#include "skeleton.dtsi"
-
-/ {
- compatible = "brcm,bcm6753";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- u-boot,dm-pre-reloc;
-
- cpu0: cpu@0 {
- compatible = "arm,cortex-a7";
- device_type = "cpu";
- reg = <0x0>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
- };
-
- cpu1: cpu@1 {
- compatible = "arm,cortex-a7";
- device_type = "cpu";
- reg = <0x1>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
- };
-
- cpu2: cpu@2 {
- compatible = "arm,cortex-a7";
- device_type = "cpu";
- reg = <0x2>;
- next-level-cache = <&l2>;
- u-boot,dm-pre-reloc;
- };
-
- l2: l2-cache0 {
- compatible = "cache";
- u-boot,dm-pre-reloc;
- };
- };
-
- clocks {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- u-boot,dm-pre-reloc;
-
- periph_osc: periph-osc {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- u-boot,dm-pre-reloc;
- };
-
- hsspi_pll: hsspi-pll {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clocks = <&periph_osc>;
- clock-mult = <2>;
- clock-div = <1>;
- };
-
- refclk50mhz: refclk50mhz {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <50000000>;
- };
- };
-
- ubus {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- u-boot,dm-pre-reloc;
-
- uart0: serial@ff812000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0xff812000 0x1000>;
- clock = <50000000>;
-
- status = "disabled";
- };
-
- wdt1: watchdog@ff800480 {
- compatible = "brcm,bcm6345-wdt";
- reg = <0xff800480 0x14>;
- clocks = <&refclk50mhz>;
- };
-
- wdt2: watchdog@ff8004c0 {
- compatible = "brcm,bcm6345-wdt";
- reg = <0xff8004c0 0x14>;
- clocks = <&refclk50mhz>;
- };
-
- wdt-reboot {
- compatible = "wdt-reboot";
- wdt = <&wdt1>;
- };
-
- gpio0: gpio-controller@0xff800500 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0xff800500 0x4>,
- <0xff800520 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio1: gpio-controller@0xff800504 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0xff800504 0x4>,
- <0xff800524 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio2: gpio-controller@0xff800508 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0xff800508 0x4>,
- <0xff800528 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio3: gpio-controller@0xff80050c {
- compatible = "brcm,bcm6345-gpio";
- reg = <0xff80050c 0x4>,
- <0xff80052c 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio4: gpio-controller@0xff800510 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0xff800510 0x4>,
- <0xff800530 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio5: gpio-controller@0xff800514 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0xff800514 0x4>,
- <0xff800534 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio6: gpio-controller@0xff800518 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0xff800518 0x4>,
- <0xff800538 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- gpio7: gpio-controller@0xff80051c {
- compatible = "brcm,bcm6345-gpio";
- reg = <0xff80051c 0x4>,
- <0xff80053c 0x4>;
- gpio-controller;
- #gpio-cells = <2>;
-
- status = "disabled";
- };
-
- nand: nand-controller@ff801800 {
- compatible = "brcm,nand-bcm6753",
- "brcm,brcmnand-v5.0",
- "brcm,brcmnand";
- reg-names = "nand", "nand-int-base", "nand-cache";
- reg = <0xff801800 0x180>,
- <0xff802000 0x10>,
- <0xff801c00 0x200>;
- parameter-page-big-endian = <0>;
-
- status = "disabled";
- };
-
- leds: led-controller@ff803000 {
- compatible = "brcm,bcm6753-leds";
- reg = <0xff803000 0x3480>;
-
- status = "disabled";
- };
- };
-};
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
+ * Copyright (C) 2022 Philippe Reynes <philippe.reynes@softathome.com>
* Copyright 2022 Broadcom Ltd.
*/
};
clocks: clocks {
+ u-boot,dm-pre-reloc;
+
periph_clk: periph-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-div = <4>;
clock-mult = <1>;
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-mult = <2>;
+ clock-div = <1>;
+ };
+
+ wdt_clk: wdt-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
};
psci {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xff800000 0x800000>;
+ u-boot,dm-pre-reloc;
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
+
+ wdt1: watchdog@480 {
+ compatible = "brcm,bcm6345-wdt";
+ reg = <0x480 0x14>;
+ clocks = <&wdt_clk>;
+ };
+
+ wdt2: watchdog@4c0 {
+ compatible = "brcm,bcm6345-wdt";
+ reg = <0x4c0 0x14>;
+ clocks = <&wdt_clk>;
+ };
+
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <&wdt1>;
+ };
+
+ gpio0: gpio-controller@500 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x500 0x4>,
+ <0x520 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio1: gpio-controller@504 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x504 0x4>,
+ <0x524 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio2: gpio-controller@508 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x508 0x4>,
+ <0x528 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio3: gpio-controller@50c {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x50c 0x4>,
+ <0x52c 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio4: gpio-controller@510 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x510 0x4>,
+ <0x530 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio5: gpio-controller@514 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x514 0x4>,
+ <0x534 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio6: gpio-controller@518 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x518 0x4>,
+ <0x538 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ gpio7: gpio-controller@51c {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x51c 0x4>,
+ <0x53c 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ nand: nand-controller@1800 {
+ compatible = "brcm,nand-bcm6753",
+ "brcm,brcmnand-v5.0",
+ "brcm,brcmnand";
+ reg-names = "nand", "nand-int-base", "nand-cache";
+ reg = <0x1800 0x180>,
+ <0x2000 0x10>,
+ <0x1c00 0x200>;
+ parameter-page-big-endian = <0>;
+
+ status = "disabled";
+ };
+
+ leds: led-controller@3000 {
+ compatible = "brcm,bcm6753-leds";
+ reg = <0x3000 0x3480>;
+
+ status = "disabled";
+ };
};
};
/dts-v1/;
-#include "bcm6753.dtsi"
+#include "bcm6855.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
- model = "Broadcom bcm6753ref";
- compatible = "broadcom,bcm6753ref", "brcm,bcm6753";
+ model = "Broadcom BCM96753REF Reference Board";
+ compatible = "brcm,bcm96753ref", "brcm,bcm6855", "brcm,bcmbca";
aliases {
serial0 = &uart0;
+++ /dev/null
-if TARGET_BCM96753REF
-
-config SYS_VENDOR
- default "broadcom"
-
-config SYS_BOARD
- default "bcm96753ref"
-
-config SYS_CONFIG_NAME
- default "broadcom_bcm96753ref"
-
-endif
-
-config TARGET_BCM96753REF
- bool "Support Broadcom bcm96753ref"
- depends on ARCH_BCM6753
+++ /dev/null
-BROADCOM BCM96753REF
-M: Philippe Reynes <philippe.reynes@softathome.com>
-S: Maintained
-F: board/broadcom/bcm96753ref
-F: include/configs/broadcom_bcm96753ref.h
-F: configs/bcm96753ref_ram_defconfig
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0+
-
-obj-y += bcm96753ref.o
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2022 Philippe Reynes <philippe.reynes@softathome.com>
- */
-
-#include <common.h>
-#include <fdtdec.h>
-#include <linux/io.h>
-#include <cpu_func.h>
-
-int board_init(void)
-{
- return 0;
-}
-
-int dram_init(void)
-{
- if (fdtdec_setup_mem_size_base() != 0)
- printf("fdtdec_setup_mem_size_base() has failed\n");
-
- return 0;
-}
-
-int dram_init_banksize(void)
-{
- fdtdec_setup_memory_banksize();
-
- return 0;
-}
-
-int print_cpuinfo(void)
-{
- return 0;
-}
-
-void enable_caches(void)
-{
- icache_enable();
- dcache_enable();
-}
+++ /dev/null
-CONFIG_ARM=y
-CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
-CONFIG_SYS_ARCH_TIMER=y
-CONFIG_ARCH_BCM6753=y
-CONFIG_SYS_TEXT_BASE=0x1000000
-CONFIG_SYS_MALLOC_F_LEN=0x1000
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_ENV_SIZE=0x20000
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="bcm96753ref"
-CONFIG_ARMV7_LPAE=y
-CONFIG_SYS_LOAD_ADDR=0x1000000
-CONFIG_TARGET_BCM96753REF=y
-CONFIG_ENV_VARS_UBOOT_CONFIG=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
-CONFIG_FIT=y
-CONFIG_FIT_SIGNATURE=y
-CONFIG_FIT_CIPHER=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-# CONFIG_AUTOBOOT is not set
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_MAXARGS=24
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-# CONFIG_CMD_BOOTD is not set
-# CONFIG_BOOTM_NETBSD is not set
-# CONFIG_BOOTM_PLAN9 is not set
-# CONFIG_BOOTM_RTEMS is not set
-# CONFIG_BOOTM_VXWORKS is not set
-# CONFIG_CMD_ELF is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EXPORTENV is not set
-# CONFIG_CMD_IMPORTENV is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_SAVEENV is not set
-# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_CRC32 is not set
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_CLK=y
-CONFIG_CMD_GPIO=y
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_MTD=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_WDT=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_CMD_UBI=y
-# CONFIG_CMD_UBIFS is not set
-# CONFIG_NET is not set
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_BUTTON=y
-CONFIG_BUTTON_GPIO=y
-CONFIG_CLK=y
-CONFIG_BCM6345_GPIO=y
-# CONFIG_INPUT is not set
-CONFIG_LED=y
-CONFIG_LED_BCM6753=y
-CONFIG_LED_BLINK=y
-CONFIG_LED_GPIO=y
-CONFIG_MISC=y
-# CONFIG_MMC is not set
-CONFIG_MTD=y
-CONFIG_DM_MTD=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_NAND_BRCMNAND=y
-CONFIG_NAND_BRCMNAND_6753=y
-CONFIG_PINCTRL=y
-CONFIG_PINCONF=y
-CONFIG_SPECIFY_CONSOLE_INDEX=y
-CONFIG_DM_SERIAL=y
-CONFIG_PL01X_SERIAL=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_SPI_MEM=y
-CONFIG_SYSRESET=y
-CONFIG_SYSRESET_WATCHDOG=y
-CONFIG_WDT_BCM6345=y
-CONFIG_REGEX=y
#define CONFIG_SYS_SDRAM_BASE 0x00000000
+#ifdef CONFIG_MTD_RAW_NAND
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#endif /* CONFIG_MTD_RAW_NAND */
+
#endif
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2022 Philippe Reynes <philippe.reynes@softathome.com>
- */
-
-#include <linux/sizes.h>
-
-/*
- * common
- */
-
-/* UART */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \
- 230400, 500000, 1500000 }
-/* Memory usage */
-
-/*
- * 6853
- */
-
-/* RAM */
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-
-/* U-Boot */
-
-#ifdef CONFIG_MTD_RAW_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#endif /* CONFIG_MTD_RAW_NAND */
-
-/*
- * 96753ref
- */
projects / uboot.git / commitdiff