If defined, the x86 reset vector code is included. This is not
needed when U-Boot is running from Coreboot.
-- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
- Option to disable subpage write in NAND driver
- driver that uses this:
- drivers/mtd/nand/raw/davinci_nand.c
-
Freescale QE/FMAN Firmware Support:
-----------------------------------
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_SYS_NAND_NO_SUBPAGE_WRITE=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_SYS_NAND_NO_SUBPAGE_WRITE=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_SYS_NAND_NO_SUBPAGE_WRITE=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_SYS_NAND_NO_SUBPAGE_WRITE=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_SYS_NAND_NO_SUBPAGE_WRITE=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=30000000
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_SYS_NAND_NO_SUBPAGE_WRITE=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=30000000
help
Enable the BBT (Bad Block Table) usage.
+config SYS_NAND_NO_SUBPAGE_WRITE
+ bool "Disable subpage write support"
+ depends on NAND_ARASAN || NAND_DAVINCI || NAND_KIRKWOOD
+
config NAND_ATMEL
bool "Support Atmel NAND controller"
select SYS_NAND_SELF_INIT
#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, }
-#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
#define DFU_ALT_INFO_MMC \
"dfu_alt_info_mmc=" \