drm/amdgpu: switch to common ras ta helper

TRIGGER_ERROR is common ras ta command for all the
ASICs that support RAS feature. switch to common helper
to avoid duplicate implementation per IP generation

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 38a6f02a41a7648e14be5f1d7dd98c48675e50e4..a45464aa9996e0dd7826b02ff4c01187f183accf 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -978,6 +978,33 @@ static int psp_ras_initialize(struct psp_context *psp)
 
        return 0;
 }
+
+int psp_ras_trigger_error(struct psp_context *psp,
+                         struct ta_ras_trigger_error_input *info)
+{
+       struct ta_ras_shared_memory *ras_cmd;
+       int ret;
+
+       if (!psp->ras.ras_initialized)
+               return -EINVAL;
+
+       ras_cmd = (struct ta_ras_shared_memory *)psp->ras.ras_shared_buf;
+       memset(ras_cmd, 0, sizeof(struct ta_ras_shared_memory));
+
+       ras_cmd->cmd_id = TA_RAS_COMMAND__TRIGGER_ERROR;
+       ras_cmd->ras_in_message.trigger_error = *info;
+
+       ret = psp_ras_invoke(psp, ras_cmd->cmd_id);
+       if (ret)
+               return -EINVAL;
+
+       /* If err_event_athub occurs error inject was successful, however
+          return status from TA is no long reliable */
+       if (amdgpu_ras_intr_triggered())
+               return 0;
+
+       return ras_cmd->ras_status;
+}
 // ras end
 
 // HDCP start

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
index 263bd8e98ba41c397221625e8af2b0d2b6507623..14802b5253ab64be87e9ae306c92bb8313dd1028 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
@@ -95,8 +95,6 @@ struct psp_funcs
                            enum psp_ring_type ring_type);
        bool (*smu_reload_quirk)(struct psp_context *psp);
        int (*mode1_reset)(struct psp_context *psp);
-       int (*ras_trigger_error)(struct psp_context *psp,
-                       struct ta_ras_trigger_error_input *info);
        int (*ras_cure_posion)(struct psp_context *psp, uint64_t *mode_ptr);
        int (*rlc_autoload_start)(struct psp_context *psp);
        int (*mem_training_init)(struct psp_context *psp);
@@ -319,9 +317,6 @@ struct amdgpu_psp_funcs {
 #define psp_mem_training(psp, ops) \
        ((psp)->funcs->mem_training ? (psp)->funcs->mem_training((psp), (ops)) : 0)
 
-#define psp_ras_trigger_error(psp, info) \
-       ((psp)->funcs->ras_trigger_error ? \
-       (psp)->funcs->ras_trigger_error((psp), (info)) : -EINVAL)
 #define psp_ras_cure_posion(psp, addr) \
        ((psp)->funcs->ras_cure_posion ? \
        (psp)->funcs->ras_cure_posion(psp, (addr)) : -EINVAL)
@@ -365,6 +360,9 @@ int psp_xgmi_set_topology_info(struct psp_context *psp,
 int psp_ras_invoke(struct psp_context *psp, uint32_t ta_cmd_id);
 int psp_ras_enable_features(struct psp_context *psp,
                union ta_ras_cmd_input *info, bool enable);
+int psp_ras_trigger_error(struct psp_context *psp,
+                         struct ta_ras_trigger_error_input *info);
+
 int psp_hdcp_invoke(struct psp_context *psp, uint32_t ta_cmd_id);
 int psp_dtm_invoke(struct psp_context *psp, uint32_t ta_cmd_id);
 

diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index 4f6c0df5dedbdb5354ab5b68a8fc153686760449..9e4f582e13577b26aa90f64a82f458514826cabf 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
@@ -524,33 +524,6 @@ static int psp_v11_0_mode1_reset(struct psp_context *psp)
        return 0;
 }
 
-static int psp_v11_0_ras_trigger_error(struct psp_context *psp,
-               struct ta_ras_trigger_error_input *info)
-{
-       struct ta_ras_shared_memory *ras_cmd;
-       int ret;
-
-       if (!psp->ras.ras_initialized)
-               return -EINVAL;
-
-       ras_cmd = (struct ta_ras_shared_memory *)psp->ras.ras_shared_buf;
-       memset(ras_cmd, 0, sizeof(struct ta_ras_shared_memory));
-
-       ras_cmd->cmd_id = TA_RAS_COMMAND__TRIGGER_ERROR;
-       ras_cmd->ras_in_message.trigger_error = *info;
-
-       ret = psp_ras_invoke(psp, ras_cmd->cmd_id);
-       if (ret)
-               return -EINVAL;
-
-       /* If err_event_athub occurs error inject was successful, however
-          return status from TA is no long reliable */
-       if (amdgpu_ras_intr_triggered())
-               return 0;
-
-       return ras_cmd->ras_status;
-}
-
 static int psp_v11_0_ras_cure_posion(struct psp_context *psp, uint64_t *mode_ptr)
 {
 #if 0
@@ -878,7 +851,6 @@ static const struct psp_funcs psp_v11_0_funcs = {
        .ring_stop = psp_v11_0_ring_stop,
        .ring_destroy = psp_v11_0_ring_destroy,
        .mode1_reset = psp_v11_0_mode1_reset,
-       .ras_trigger_error = psp_v11_0_ras_trigger_error,
        .ras_cure_posion = psp_v11_0_ras_cure_posion,
        .rlc_autoload_start = psp_v11_0_rlc_autoload_start,
        .mem_training_init = psp_v11_0_memory_training_init,