}
}
+/**
+ * amdgpu_dm_crtc_copy_transient_flags - copy mirrored flags from DRM to DC
+ * @crtc_state: the DRM CRTC state
+ * @stream_state: the DC stream state.
+ *
+ * Copy the mirrored transient state flags from DRM, to DC. It is used to bring
+ * a dc_stream_state's flags in sync with a drm_crtc_state's flags.
+ */
+static void amdgpu_dm_crtc_copy_transient_flags(struct drm_crtc_state *crtc_state,
+ struct dc_stream_state *stream_state)
+{
+ stream_state->mode_changed = crtc_state->mode_changed;
+}
static int amdgpu_dm_atomic_commit(struct drm_device *dev,
struct drm_atomic_state *state,
new_crtc_state->active_changed,
new_crtc_state->connectors_changed);
+ /* Copy all transient state flags into dc state */
+ if (dm_new_crtc_state->stream) {
+ amdgpu_dm_crtc_copy_transient_flags(&dm_new_crtc_state->base,
+ dm_new_crtc_state->stream);
+ }
+
/* handles headless hotplug case, updating new_state and
* aconnector as needed
*/
WARN_ON(dm_new_crtc_state->stream);
dm_new_crtc_state->stream = new_stream;
+
dc_stream_retain(new_stream);
DRM_DEBUG_DRIVER("Enabling DRM crtc: %d\n",
/* re-program planes for existing stream, in case we need to
* free up plane resource for later use
*/
- for (i = 0; i < dc->current_state->stream_count; i++) {
+ for (i = 0; i < context->stream_count; i++) {
+ if (context->streams[i]->mode_changed)
+ continue;
+
dc->hwss.apply_ctx_for_surface(
- dc, dc->current_state->streams[i],
- dc->current_state->stream_status[i].plane_count,
+ dc, context->streams[i],
+ context->stream_status[i].plane_count,
context); /* use new pipe config in new context */
}
for (i = 0; i < context->stream_count; i++) {
const struct dc_sink *sink = context->streams[i]->sink;
+ if (!context->streams[i]->mode_changed)
+ continue;
+
dc->hwss.apply_ctx_for_surface(
dc, context->streams[i],
context->stream_status[i].plane_count,