]> git.baikalelectronics.ru Git - kernel.git/commitdiff
drm/i915/perf: don't forget noa wait after oa config
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Wed, 13 Nov 2019 15:46:39 +0000 (17:46 +0200)
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Mon, 18 Nov 2019 14:36:19 +0000 (16:36 +0200)
I'm observing incoherence metric values, changing from run to run.

It appears the patches introducing noa wait & reconfiguration from
command stream switched places in the series multiple times during the
review. This lead to the dependency of one onto the order to go
missing...

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 91495985d415 ("drm/i915/perf: execute OA configuration from command stream")
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191113154639.27144-1-lionel.g.landwerlin@intel.com
(cherry picked from commit 93937659dc644f708def8fa58cb63c5c9f499f26)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
drivers/gpu/drm/i915/i915_perf.c

index 00317ea19a4afb31ef12ac61f61e034626770489..65d7c2e599de03718c3466f165b75183b2d27ad1 100644 (file)
@@ -1870,7 +1870,7 @@ alloc_oa_config_buffer(struct i915_perf_stream *stream,
        config_length += num_lri_dwords(oa_config->mux_regs_len);
        config_length += num_lri_dwords(oa_config->b_counter_regs_len);
        config_length += num_lri_dwords(oa_config->flex_regs_len);
-       config_length++; /* MI_BATCH_BUFFER_END */
+       config_length += 3; /* MI_BATCH_BUFFER_START */
        config_length = ALIGN(sizeof(u32) * config_length, I915_GTT_PAGE_SIZE);
 
        obj = i915_gem_object_create_shmem(stream->perf->i915, config_length);
@@ -1895,7 +1895,12 @@ alloc_oa_config_buffer(struct i915_perf_stream *stream,
                             oa_config->flex_regs,
                             oa_config->flex_regs_len);
 
-       *cs++ = MI_BATCH_BUFFER_END;
+       /* Jump into the active wait. */
+       *cs++ = (INTEL_GEN(stream->perf->i915) < 8 ?
+                MI_BATCH_BUFFER_START :
+                MI_BATCH_BUFFER_START_GEN8);
+       *cs++ = i915_ggtt_offset(stream->noa_wait);
+       *cs++ = 0;
 
        i915_gem_object_flush_map(obj);
        i915_gem_object_unpin_map(obj);