fix(cpus): workaround for Neoverse V1 errata 2779461

Neoverse V1 erratum 2779461 is a Cat B erratum that applies to
all revisions <=r1p2 and is still open.

The workaround sets CPUACTLR3_EL1[47] bit to 1. Setting this
bit might have a small impact on power and negligible impact
on performance.

SDEN documentation:https://developer.arm.com/documentation/SDEN1401781/latest

Change-Id: I367cda1779684638063d7292fda20ca6734e6f10
Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com>

diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index 4ae4e544c6384a7c7b621c8f4ef4c1d5de10a0ec..c4a0e155887544fd3dde83531c4fbc7fa2ab0b25 100644 (file)
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -472,6 +472,10 @@ For Neoverse V1, the following errata build flags are defined :
    CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 of the
    CPU. It is still open.
 
+-  ``ERRATA_V1_2779461``: This applies erratum 2779461 workaround to Neoverse-V1
+   CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, r1p2 of the
+   CPU. It is still open.
+
 For Cortex-A710, the following errata build flags are defined :
 
 -  ``ERRATA_A710_1987031``: This applies errata 1987031 workaround to

diff --git a/include/lib/cpus/aarch64/neoverse_v1.h b/include/lib/cpus/aarch64/neoverse_v1.h
index 9c7e967cb7ee5ccae37276548806465893e74d8a..4c10484f511c2a12c4604a22fcb8144138e0c6d6 100644 (file)
--- a/include/lib/cpus/aarch64/neoverse_v1.h
+++ b/include/lib/cpus/aarch64/neoverse_v1.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2022, ARM Limited. All rights reserved.
+ * Copyright (c) 2019-2023, ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -41,4 +41,6 @@
 #define NEOVERSE_V1_ACTLR2_EL1_BIT_28                          (ULL(1) << 28)
 #define NEOVERSE_V1_ACTLR2_EL1_BIT_40                          (ULL(1) << 40)
 
+#define NEOVERSE_V1_ACTLR3_EL1                                 S3_0_C15_C1_2
+
 #endif /* NEOVERSE_V1_H */

diff --git a/lib/cpus/aarch64/neoverse_v1.S b/lib/cpus/aarch64/neoverse_v1.S
index c3a70ca4ceb4a18d33a74feaa3260d15b17d1d27..f9a578985b0c70267b4d329072c3d8068d5c9fa6 100644 (file)
--- a/lib/cpus/aarch64/neoverse_v1.S
+++ b/lib/cpus/aarch64/neoverse_v1.S
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2023, Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -486,6 +486,35 @@ func check_errata_2743093
        b       cpu_rev_var_ls
 endfunc check_errata_2743093
 
+       /* ----------------------------------------------------
+        * Errata Workaround for Neoverse V1 Errata #2779461.
+        * This applies to revisions r0p0, r1p0, r1p1, and r1p2.
+        * It is still open.
+        * x0: variant[4:7] and revision[0:3] of current cpu.
+        * Shall clobber: x0-x1, x17
+        * ----------------------------------------------------
+        */
+func errata_neoverse_v1_2779461_wa
+       /* Check revision. */
+       mov     x17, x30
+       bl      check_errata_2779461
+       cbz     x0, 1f
+
+       /* Apply the workaround */
+       mrs     x1, NEOVERSE_V1_ACTLR3_EL1
+       orr     x1, x1, #BIT(47)
+       msr     NEOVERSE_V1_ACTLR3_EL1, x1
+
+1:
+       ret     x17
+endfunc errata_neoverse_v1_2779461_wa
+
+func check_errata_2779461
+       /* Applies to r0p0, r1p0, r1p1, r1p2 */
+       mov     x1, #CPU_REV(1, 2)
+       b       cpu_rev_var_ls
+endfunc check_errata_2779461
+
 func check_errata_cve_2022_23960
 #if WORKAROUND_CVE_2022_23960
        mov     x0, #ERRATA_APPLIES
@@ -544,6 +573,7 @@ func neoverse_v1_errata_report
        report_errata ERRATA_V1_2294912, neoverse_v1, 2294912
        report_errata ERRATA_V1_2372203, neoverse_v1, 2372203
        report_errata ERRATA_V1_2743093, neoverse_v1, 2743093
+       report_errata ERRATA_V1_2779461, neoverse_v1, 2779461
        report_errata WORKAROUND_CVE_2022_23960, neoverse_v1, cve_2022_23960
 
        ldp     x8, x30, [sp], #16
@@ -622,6 +652,11 @@ func neoverse_v1_reset_func
        bl      errata_neoverse_v1_2372203_wa
 #endif
 
+#if ERRATA_V1_2779461
+       mov     x0, x18
+       bl      errata_neoverse_v1_2779461_wa
+#endif
+
 #if IMAGE_BL31 && WORKAROUND_CVE_2022_23960
        /*
         * The Neoverse-V1 generic vectors are overridden to apply errata

diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index ae6baa717dd8bbc2c0aa6eb7a578101c9da06455..4d50c1bb10317b533530b2d577f9c1157693ea2b 100644 (file)
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -526,6 +526,11 @@ ERRATA_V1_2372203  ?=0
 # still open.
 ERRATA_V1_2743093      ?=0
 
+# Flag to apply erratum 2779461 workaround during powerdown. This erratum
+# applies to revisions r0p0, r1p0, r1p1 and r1p2  of the Neoverse V1 cpu and is
+# still open.
+ERRATA_V1_2779461       ?=0
+
 # Flag to apply erratum 1987031 workaround during reset. This erratum applies
 # to revisions r0p0, r1p0 and r2p0 of the Cortex-A710 cpu and is still open.
 ERRATA_A710_1987031    ?=0
@@ -1194,6 +1199,10 @@ $(eval $(call add_define,ERRATA_V1_2372203))
 $(eval $(call assert_boolean,ERRATA_V1_2743093))
 $(eval $(call add_define,ERRATA_V1_2743093))
 
+# Process ERRATA_V1_2779461 flag
+$(eval $(call assert_boolean,ERRATA_V1_2779461))
+$(eval $(call add_define,ERRATA_V1_2779461))
+
 # Process ERRATA_A710_1987031 flag
 $(eval $(call assert_boolean,ERRATA_A710_1987031))
 $(eval $(call add_define,ERRATA_A710_1987031))