drm/i915/gvt: add RING_INSTDONE and SC_INSTDONE mmio handler in GVT-g

kernel hangcheck needs to check RING_INSTDONE and SC_INSTDONE registers'
state to know if hardware is still running. In GVT-g environment, we need
to emulate these registers changing for all the guests although they are
not render owner. Here we return the physical state for all the guests,
then if INSTDONE is changing guest can know hardware is still running
although its workload is pending.

Read INSTDONE isn't one correct way to know if guest trigger gfx reset,
especially with Linux guest, it will read ACTH first, then check INSTDONE
and SUBSLICE registers to check if hardware is still running, at last
trigger gfx reset when it finds all the registers is frozen. In Windows
guest, read INSTDONE usually happens when OS detect TDR.

With the difference between Windows and Linux guest, "disable_warn_untrack"
may let debug log run into wrong state(Linux guest trigger hangcheck
with no ACTHD changed, then check INSTDONE), but actually there is no TDR
happened.

The new policy is always WARN with untrack MMIO r/w. Bad effect is many
noisy untrack mmio warning logs exist when real TDR happen. Even so you can
control the log output or not by setting the debug mask bit.

v2: remove log in instdone_mmio_read

Suggested-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Weinan Li <weinan.z.li@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 0ad1a508e2af478dc9fb91df18bdc95304efad44..3edff42d8f0c4f6f353eeec14854167c445271f3 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -1409,6 +1409,15 @@ static int ring_timestamp_mmio_read(struct intel_vgpu *vgpu,
        return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);
 }
 
+static int instdone_mmio_read(struct intel_vgpu *vgpu,
+               unsigned int offset, void *p_data, unsigned int bytes)
+{
+       struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
+
+       vgpu_vreg(vgpu, offset) = I915_READ(_MMIO(offset));
+       return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);
+}
+
 static int elsp_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
                void *p_data, unsigned int bytes)
 {
@@ -1593,6 +1602,12 @@ static int init_generic_mmio_info(struct intel_gvt *gvt)
        MMIO_RING_DFH(RING_REG, D_ALL, F_CMD_ACCESS, NULL, NULL);
 #undef RING_REG
 
+#define RING_REG(base) (base + 0x6c)
+       MMIO_RING_DFH(RING_REG, D_ALL, 0, instdone_mmio_read, NULL);
+       MMIO_DH(RING_REG(GEN8_BSD2_RING_BASE), D_ALL, instdone_mmio_read, NULL);
+#undef RING_REG
+       MMIO_DH(GEN7_SC_INSTDONE, D_HSW_PLUS, instdone_mmio_read, NULL);
+
        MMIO_GM_RDR(0x2148, D_ALL, NULL, NULL);
        MMIO_GM_RDR(CCID, D_ALL, NULL, NULL);
        MMIO_GM_RDR(0x12198, D_ALL, NULL, NULL);

diff --git a/drivers/gpu/drm/i915/gvt/mmio.c b/drivers/gpu/drm/i915/gvt/mmio.c
index 1ba3bdb093416674c2f44014942971bcdcd8ea9e..35f6c4713cb615cef2ef293af335aa402e6a3727 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/mmio.c
+++ b/drivers/gpu/drm/i915/gvt/mmio.c
@@ -202,13 +202,6 @@ int intel_vgpu_emulate_mmio_read(struct intel_vgpu *vgpu, uint64_t pa,
                if (!vgpu->mmio.disable_warn_untrack) {
                        gvt_vgpu_err("read untracked MMIO %x(%dB) val %x\n",
                                offset, bytes, *(u32 *)p_data);
-
-                       if (offset == 0x206c) {
-                               gvt_vgpu_err("------------------------------------------\n");
-                               gvt_vgpu_err("likely triggers a gfx reset\n");
-                               gvt_vgpu_err("------------------------------------------\n");
-                               vgpu->mmio.disable_warn_untrack = true;
-                       }
                }
        }