]> git.baikalelectronics.ru Git - kernel.git/commitdiff
scsi: ufs: ufs-mediatek: Fix the timing of configuring device regulators
authorPo-Wen Kao <powen.kao@mediatek.com>
Thu, 16 Jun 2022 05:37:18 +0000 (13:37 +0800)
committerMartin K. Petersen <martin.petersen@oracle.com>
Fri, 17 Jun 2022 02:08:43 +0000 (22:08 -0400)
Currently the LPM configurations of device regulators may not work since
VCC is not disabled yet while ufs_mtk_vreg_set_lpm() is executed.

Fix this by changing the timing of invoking ufs_mtk_vreg_set_lpm().

Link: https://lore.kernel.org/r/20220616053725.5681-5-stanley.chu@mediatek.com
Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com>
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/ufs/host/ufs-mediatek.c

index 2931fd21e38a43c6ea22887f2e958fb81abaf326..817d957512a335a16341de56b79fb93368d04d0e 100644 (file)
@@ -1082,7 +1082,6 @@ static int ufs_mtk_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op,
                 * ufshcd_suspend() re-enabling regulators while vreg is still
                 * in low-power mode.
                 */
-               ufs_mtk_vreg_set_lpm(hba, true);
                err = ufs_mtk_mphy_power_on(hba, false);
                if (err)
                        goto fail;
@@ -1106,12 +1105,13 @@ static int ufs_mtk_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
 {
        int err;
 
+       if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL)
+               ufs_mtk_vreg_set_lpm(hba, false);
+
        err = ufs_mtk_mphy_power_on(hba, true);
        if (err)
                goto fail;
 
-       ufs_mtk_vreg_set_lpm(hba, false);
-
        if (ufshcd_is_link_hibern8(hba)) {
                err = ufs_mtk_link_set_hpm(hba);
                if (err)
@@ -1276,9 +1276,57 @@ static int ufs_mtk_remove(struct platform_device *pdev)
        return 0;
 }
 
+int ufs_mtk_system_suspend(struct device *dev)
+{
+       struct ufs_hba *hba = dev_get_drvdata(dev);
+       int ret;
+
+       ret = ufshcd_system_suspend(dev);
+       if (ret)
+               return ret;
+
+       ufs_mtk_vreg_set_lpm(hba, true);
+
+       return 0;
+}
+
+int ufs_mtk_system_resume(struct device *dev)
+{
+       struct ufs_hba *hba = dev_get_drvdata(dev);
+
+       ufs_mtk_vreg_set_lpm(hba, false);
+
+       return ufshcd_system_resume(dev);
+}
+
+int ufs_mtk_runtime_suspend(struct device *dev)
+{
+       struct ufs_hba *hba = dev_get_drvdata(dev);
+       int ret = 0;
+
+       ret = ufshcd_runtime_suspend(dev);
+       if (ret)
+               return ret;
+
+       ufs_mtk_vreg_set_lpm(hba, true);
+
+       return 0;
+}
+
+int ufs_mtk_runtime_resume(struct device *dev)
+{
+       struct ufs_hba *hba = dev_get_drvdata(dev);
+
+       ufs_mtk_vreg_set_lpm(hba, false);
+
+       return ufshcd_runtime_resume(dev);
+}
+
 static const struct dev_pm_ops ufs_mtk_pm_ops = {
-       SET_SYSTEM_SLEEP_PM_OPS(ufshcd_system_suspend, ufshcd_system_resume)
-       SET_RUNTIME_PM_OPS(ufshcd_runtime_suspend, ufshcd_runtime_resume, NULL)
+       SET_SYSTEM_SLEEP_PM_OPS(ufs_mtk_system_suspend,
+                               ufs_mtk_system_resume)
+       SET_RUNTIME_PM_OPS(ufs_mtk_runtime_suspend,
+                          ufs_mtk_runtime_resume, NULL)
        .prepare         = ufshcd_suspend_prepare,
        .complete        = ufshcd_resume_complete,
 };