net/mlx5: Wait for firmware to enable CRS before pci_restore_state

After firmware reset driver should verify firmware already enabled CRS
and became responsive to pci config cycles before restoring pci state.
Fix that by waiting till device_id is readable through PCI again.

Fixes: eabe8e5e88f5 ("net/mlx5: Handle sync reset now event")
Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Link: https://lore.kernel.org/r/20221026135153.154807-3-saeed@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c b/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c
index e8896f36836260fafd2c377e2ce038d11dcf61df..07c583996c2975b2ba1aaee7be21d13a6d060f55 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c
@@ -358,6 +358,23 @@ static int mlx5_pci_link_toggle(struct mlx5_core_dev *dev)
                err = -ETIMEDOUT;
        }
 
+       do {
+               err = pci_read_config_word(dev->pdev, PCI_DEVICE_ID, &reg16);
+               if (err)
+                       return err;
+               if (reg16 == dev_id)
+                       break;
+               msleep(20);
+       } while (!time_after(jiffies, timeout));
+
+       if (reg16 == dev_id) {
+               mlx5_core_info(dev, "Firmware responds to PCI config cycles again\n");
+       } else {
+               mlx5_core_err(dev, "Firmware is not responsive (0x%04x) after %llu ms\n",
+                             reg16, mlx5_tout_ms(dev, PCI_TOGGLE));
+               err = -ETIMEDOUT;
+       }
+
 restore:
        list_for_each_entry(sdev, &bridge_bus->devices, bus_list) {
                pci_cfg_access_unlock(sdev);