drm/i915/display: support ddr5 mem types

Add DDR5 and LPDDR5 return values from punit fw.

BSPEC: 54023
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210204200458.21875-1-clinton.a.taylor@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index ba9e713585e71e33ee5f40f1478301d1d934a80a..d122b99655323e5e8f58af8f75e17a00964771a8 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -78,7 +78,17 @@ static int icl_get_qgv_points(struct drm_i915_private *dev_priv,
        qi->num_points = dram_info->num_qgv_points;
 
        if (IS_GEN(dev_priv, 12))
-               qi->t_bl = dev_priv->dram_info.type == INTEL_DRAM_DDR4 ? 4 : 16;
+               switch (dram_info->type) {
+               case INTEL_DRAM_DDR4:
+                       qi->t_bl = 4;
+                       break;
+               case INTEL_DRAM_DDR5:
+                       qi->t_bl = 8;
+                       break;
+               default:
+                       qi->t_bl = 16;
+                       break;
+               }
        else if (IS_GEN(dev_priv, 11))
                qi->t_bl = dev_priv->dram_info.type == INTEL_DRAM_DDR4 ? 4 : 8;
 

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 105109bc84dad9a78ba549b9d6825f104abfe063..60c52588d552ab79dd638e322162e2659c5454c2 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1133,7 +1133,9 @@ struct drm_i915_private {
                        INTEL_DRAM_DDR3,
                        INTEL_DRAM_DDR4,
                        INTEL_DRAM_LPDDR3,
-                       INTEL_DRAM_LPDDR4
+                       INTEL_DRAM_LPDDR4,
+                       INTEL_DRAM_DDR5,
+                       INTEL_DRAM_LPDDR5,
                } type;
                u8 num_qgv_points;
        } dram_info;

diff --git a/drivers/gpu/drm/i915/intel_dram.c b/drivers/gpu/drm/i915/intel_dram.c
index 73d256fc6830677c0706e08aa8555e192fff07f6..1e53c017c30d4f82c5cb6b0a8540b7159a9195c8 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dram.c
+++ b/drivers/gpu/drm/i915/intel_dram.c
@@ -427,6 +427,12 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv)
                case 0:
                        dram_info->type = INTEL_DRAM_DDR4;
                        break;
+               case 1:
+                       dram_info->type = INTEL_DRAM_DDR5;
+                       break;
+               case 2:
+                       dram_info->type = INTEL_DRAM_LPDDR5;
+                       break;
                case 3:
                        dram_info->type = INTEL_DRAM_LPDDR4;
                        break;