octeontx2-af: Set proper errorcode for IPv4 checksum errors

With current config, for packets with IPv4 checksum errors,
errorcode is being set to UNKNOWN. Hence added a separate
errorcodes for outer and inner IPv4 checksum and changed
NPC configuration accordingly.

Also turn on L2 multicast address check in NPC protocol check block.

Fixes: 6b3321bacc5a ("octeontx2-af: Enable packet length and csum validation")
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
index 4d94bd03a5162b0504b8a80fa4929e267dd4a391..5efb4174e82dff2d44a903125f3d514427652a5c 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
@@ -2020,14 +2020,15 @@ int rvu_npc_init(struct rvu *rvu)
 
        /* Enable below for Rx pkts.
         * - Outer IPv4 header checksum validation.
-        * - Detect outer L2 broadcast address and set NPC_RESULT_S[L2M].
+        * - Detect outer L2 broadcast address and set NPC_RESULT_S[L2B].
+        * - Detect outer L2 multicast address and set NPC_RESULT_S[L2M].
         * - Inner IPv4 header checksum validation.
         * - Set non zero checksum error code value
         */
        rvu_write64(rvu, blkaddr, NPC_AF_PCK_CFG,
                    rvu_read64(rvu, blkaddr, NPC_AF_PCK_CFG) |
-                   BIT_ULL(32) | BIT_ULL(24) | BIT_ULL(6) |
-                   BIT_ULL(2) | BIT_ULL(1));
+                   ((u64)NPC_EC_OIP4_CSUM << 32) | (NPC_EC_IIP4_CSUM << 24) |
+                   BIT_ULL(7) | BIT_ULL(6) | BIT_ULL(2) | BIT_ULL(1));
 
        rvu_npc_setup_interfaces(rvu, blkaddr);