drm/i915: Add tracepoints to track a vm during its lifetime

- ppgtt init/release: these tracepoints are useful for observing the
  creation and destruction of Full PPGTTs.

- ctx create/free: we can use the ctx_free trace in combination with the
  ppgtt_release one to be sure that the ppgtt doesn't stay alive for too
  long after the ctx is destroyed. ctx_create is there for simmetry

- switch_mm: important point in the lifetime of the vm

v4: add DOC information
v5: pull the DOC in drm.tmpl
v6: clean ppgtt init/release traces + add ctx create/free and switch_mm
    tracepoints (Chris)
v7: drop execlist_submit_context tracepoint

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl
index 9d9977211b232360dc387d65ea9eb640c2f89483..9449cd65f1d0f700c921d23d123c2ccd1c59518e 100644 (file)
--- a/Documentation/DocBook/drm.tmpl
+++ b/Documentation/DocBook/drm.tmpl
@@ -4001,6 +4001,27 @@ int num_ioctls;</synopsis>
 !Idrivers/gpu/drm/i915/intel_lrc.c
       </sect2>
     </sect1>
+
+    <sect1>
+      <title> Tracing </title>
+      <para>
+    This sections covers all things related to the tracepoints implemented in
+    the i915 driver.
+      </para>
+      <sect2>
+        <title> i915_ppgtt_create and i915_ppgtt_release </title>
+!Pdrivers/gpu/drm/i915/i915_trace.h i915_ppgtt_create and i915_ppgtt_release tracepoints
+      </sect2>
+      <sect2>
+        <title> i915_context_create and i915_context_free </title>
+!Pdrivers/gpu/drm/i915/i915_trace.h i915_context_create and i915_context_free tracepoints
+      </sect2>
+      <sect2>
+        <title> switch_mm </title>
+!Pdrivers/gpu/drm/i915/i915_trace.h switch_mm tracepoint
+      </sect2>
+    </sect1>
+
   </chapter>
 !Cdrivers/gpu/drm/i915/i915_irq.c
 </part>

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 7d3257111737e7babdb37d48f4269172c62cec3d..1fb00008623d648549fc71113031e378d7292be2 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -88,6 +88,7 @@
 #include <drm/drmP.h>
 #include <drm/i915_drm.h>
 #include "i915_drv.h"
+#include "i915_trace.h"
 
 /* This is a HW constraint. The value below is the largest known requirement
  * I've seen in a spec to date, and that was a workaround for a non-shipping
@@ -137,6 +138,8 @@ void i915_gem_context_free(struct kref *ctx_ref)
        struct intel_context *ctx = container_of(ctx_ref,
                                                 typeof(*ctx), ref);
 
+       trace_i915_context_free(ctx);
+
        if (i915.enable_execlists)
                intel_lr_context_free(ctx);
 
@@ -274,6 +277,8 @@ i915_gem_create_context(struct drm_device *dev,
                ctx->ppgtt = ppgtt;
        }
 
+       trace_i915_context_create(ctx);
+
        return ctx;
 
 err_unpin:
@@ -549,6 +554,7 @@ static int do_switch(struct intel_engine_cs *ring,
        from = ring->last_context;
 
        if (to->ppgtt) {
+               trace_switch_mm(ring, to);
                ret = to->ppgtt->switch_mm(to->ppgtt, ring);
                if (ret)
                        goto unpin_out;

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index de12017c809b799d4df0971f47568220994096aa..4498a068a5a75ae7e78be534349d8edf4c9021b3 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1174,6 +1174,8 @@ i915_ppgtt_create(struct drm_device *dev, struct drm_i915_file_private *fpriv)
 
        ppgtt->file_priv = fpriv;
 
+       trace_i915_ppgtt_create(&ppgtt->base);
+
        return ppgtt;
 }
 
@@ -1182,6 +1184,8 @@ void  i915_ppgtt_release(struct kref *kref)
        struct i915_hw_ppgtt *ppgtt =
                container_of(kref, struct i915_hw_ppgtt, ref);
 
+       trace_i915_ppgtt_release(&ppgtt->base);
+
        /* vmas should already be unbound */
        WARN_ON(!list_empty(&ppgtt->base.active_list));
        WARN_ON(!list_empty(&ppgtt->base.inactive_list));

diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index f5aa0067755a04aa0bb52d58f3dcabc3e3aa1f94..751d4ad14d6224028c93b1bdcdeec1f2d1b46a16 100644 (file)
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -587,6 +587,110 @@ TRACE_EVENT(intel_gpu_freq_change,
            TP_printk("new_freq=%u", __entry->freq)
 );
 
+/**
+ * DOC: i915_ppgtt_create and i915_ppgtt_release tracepoints
+ *
+ * With full ppgtt enabled each process using drm will allocate at least one
+ * translation table. With these traces it is possible to keep track of the
+ * allocation and of the lifetime of the tables; this can be used during
+ * testing/debug to verify that we are not leaking ppgtts.
+ * These traces identify the ppgtt through the vm pointer, which is also printed
+ * by the i915_vma_bind and i915_vma_unbind tracepoints.
+ */
+DECLARE_EVENT_CLASS(i915_ppgtt,
+       TP_PROTO(struct i915_address_space *vm),
+       TP_ARGS(vm),
+
+       TP_STRUCT__entry(
+                       __field(struct i915_address_space *, vm)
+                       __field(u32, dev)
+       ),
+
+       TP_fast_assign(
+                       __entry->vm = vm;
+                       __entry->dev = vm->dev->primary->index;
+       ),
+
+       TP_printk("dev=%u, vm=%p", __entry->dev, __entry->vm)
+)
+
+DEFINE_EVENT(i915_ppgtt, i915_ppgtt_create,
+       TP_PROTO(struct i915_address_space *vm),
+       TP_ARGS(vm)
+);
+
+DEFINE_EVENT(i915_ppgtt, i915_ppgtt_release,
+       TP_PROTO(struct i915_address_space *vm),
+       TP_ARGS(vm)
+);
+
+/**
+ * DOC: i915_context_create and i915_context_free tracepoints
+ *
+ * These tracepoints are used to track creation and deletion of contexts.
+ * If full ppgtt is enabled, they also print the address of the vm assigned to
+ * the context.
+ */
+DECLARE_EVENT_CLASS(i915_context,
+       TP_PROTO(struct intel_context *ctx),
+       TP_ARGS(ctx),
+
+       TP_STRUCT__entry(
+                       __field(u32, dev)
+                       __field(struct intel_context *, ctx)
+                       __field(struct i915_address_space *, vm)
+       ),
+
+       TP_fast_assign(
+                       __entry->ctx = ctx;
+                       __entry->vm = ctx->ppgtt ? &ctx->ppgtt->base : NULL;
+                       __entry->dev = ctx->file_priv->dev_priv->dev->primary->index;
+       ),
+
+       TP_printk("dev=%u, ctx=%p, ctx_vm=%p",
+                 __entry->dev, __entry->ctx, __entry->vm)
+)
+
+DEFINE_EVENT(i915_context, i915_context_create,
+       TP_PROTO(struct intel_context *ctx),
+       TP_ARGS(ctx)
+);
+
+DEFINE_EVENT(i915_context, i915_context_free,
+       TP_PROTO(struct intel_context *ctx),
+       TP_ARGS(ctx)
+);
+
+/**
+ * DOC: switch_mm tracepoint
+ *
+ * This tracepoint allows tracking of the mm switch, which is an important point
+ * in the lifetime of the vm in the legacy submission path. This tracepoint is
+ * called only if full ppgtt is enabled.
+ */
+TRACE_EVENT(switch_mm,
+       TP_PROTO(struct intel_engine_cs *ring, struct intel_context *to),
+
+       TP_ARGS(ring, to),
+
+       TP_STRUCT__entry(
+                       __field(u32, ring)
+                       __field(struct intel_context *, to)
+                       __field(struct i915_address_space *, vm)
+                       __field(u32, dev)
+       ),
+
+       TP_fast_assign(
+                       __entry->ring = ring->id;
+                       __entry->to = to;
+                       __entry->vm = to->ppgtt? &to->ppgtt->base : NULL;
+                       __entry->dev = ring->dev->primary->index;
+       ),
+
+       TP_printk("dev=%u, ring=%u, ctx=%p, ctx_vm=%p",
+                 __entry->dev, __entry->ring, __entry->to, __entry->vm)
+);
+
 #endif /* _I915_TRACE_H_ */
 
 /* This part must be outside protection */