amd64_edac: fix CECCs reporting

Shift error type bits properly.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 3ee539a3fbb4d6743e85998fb463fc263ed7c528..a38831c8264995ab506428ccda6124a732dc636a 100644 (file)
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2254,7 +2254,7 @@ static inline void __amd64_decode_bus_error(struct mem_ctl_info *mci,
 {
        u32 ec  = ERROR_CODE(info->nbsl);
        u32 xec = EXT_ERROR_CODE(info->nbsl);
-       int ecc_type = info->nbsh & (0x3 << 13);
+       int ecc_type = (info->nbsh >> 13) & 0x3;
 
        /* Bail early out if this was an 'observed' error */
        if (PP(ec) == K8_NBSL_PP_OBS)