dt-bindings: net: add fsl,erratum-a011043

Add an entry for erratum A011043: the MDIO_CFG[MDIO_RD_ER]
bit may be falsely set when reading internal PCS registers.
MDIO reads to internal PCS registers may result in having
the MDIO_CFG[MDIO_RD_ER] bit set, even when there is no
error and read data (MDIO_DATA[MDIO_DATA]) is correct.
Software may get false read error when reading internal
PCS registers through MDIO. As a workaround, all internal
MDIO accesses should ignore the MDIO_CFG[MDIO_RD_ER] bit.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/Documentation/devicetree/bindings/net/fsl-fman.txt b/Documentation/devicetree/bindings/net/fsl-fman.txt
index 299c0dcd67db456fd8ded1b9ff71719ecaef9d2c..250f8d8cdce4bc17d0acc1bdb3ee2bb7ecf3fb34 100644 (file)
--- a/Documentation/devicetree/bindings/net/fsl-fman.txt
+++ b/Documentation/devicetree/bindings/net/fsl-fman.txt
@@ -403,6 +403,19 @@ PROPERTIES
                The settings and programming routines for internal/external
                MDIO are different. Must be included for internal MDIO.
 
+- fsl,erratum-a011043
+               Usage: optional
+               Value type: <boolean>
+               Definition: Indicates the presence of the A011043 erratum
+               describing that the MDIO_CFG[MDIO_RD_ER] bit may be falsely
+               set when reading internal PCS registers. MDIO reads to
+               internal PCS registers may result in having the
+               MDIO_CFG[MDIO_RD_ER] bit set, even when there is no error and
+               read data (MDIO_DATA[MDIO_DATA]) is correct.
+               Software may get false read error when reading internal
+               PCS registers through MDIO. As a workaround, all internal
+               MDIO accesses should ignore the MDIO_CFG[MDIO_RD_ER] bit.
+
 For internal PHY device on internal mdio bus, a PHY node should be created.
 See the definition of the PHY node in booting-without-of.txt for an
 example of how to define a PHY (Internal PHY has no interrupt line).