smum_send_msg_to_smc_with_parameter(hwmgr,
(PPSMC_Msg)PPSMC_MSG_SetVBITimeout, data->frame_time_x2,
NULL);
+ data->last_sent_vbi_timeout = data->frame_time_x2;
}
return (smum_send_msg_to_smc(hwmgr, (PPSMC_Msg)PPSMC_HasDisplay, NULL) == 0) ? 0 : -EINVAL;
if (data->display_timing.vrefresh != hwmgr->display_config->vrefresh)
is_update_required = true;
+ if (hwmgr->chip_id >= CHIP_POLARIS10 &&
+ hwmgr->chip_id <= CHIP_VEGAM &&
+ data->last_sent_vbi_timeout != data->frame_time_x2)
+ is_update_required = true;
+
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) {
if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr &&
(data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK ||
uint32_t avfs_vdroop_override_setting;
bool apply_avfs_cks_off_voltage;
uint32_t frame_time_x2;
+ uint32_t last_sent_vbi_timeout;
uint16_t mem_latency_high;
uint16_t mem_latency_low;
uint32_t vr_config;