/* enable SCLK dpm */
if (!data->sclk_dpm_key_disabled) {
- if (hwmgr->chip_id == CHIP_VEGAM)
+ if (hwmgr->chip_id >= CHIP_POLARIS10 &&
+ hwmgr->chip_id <= CHIP_VEGAM)
smu7_disable_sclk_vce_handshake(hwmgr);
PP_ASSERT_WITH_CODE(
"Failed to enable MCLK DPM during DPM Start Function!",
return -EINVAL);
- if (hwmgr->chip_family != CHIP_VEGAM)
+ if ((hwmgr->chip_family == AMDGPU_FAMILY_CI) ||
+ (hwmgr->chip_id == CHIP_POLARIS10) ||
+ (hwmgr->chip_id == CHIP_POLARIS11) ||
+ (hwmgr->chip_id == CHIP_POLARIS12) ||
+ (hwmgr->chip_id == CHIP_TONGA))
PHM_WRITE_FIELD(hwmgr->device, MC_SEQ_CNTL_3, CAC_EN, 0x1);
case SMU_MAX_LEVELS_MVDD:
return SMU74_MAX_LEVELS_MVDD;
case SMU_UVD_MCLK_HANDSHAKE_DISABLE:
- return SMU7_UVD_MCLK_HANDSHAKE_DISABLE;
+ return SMU7_UVD_MCLK_HANDSHAKE_DISABLE |
+ SMU7_VCE_MCLK_HANDSHAKE_DISABLE;
}
pr_warn("can't get the mac of %x\n", value);